164 	int node, err;  in fpga_get_system_frequency()  local
174 		err = fdt_read_uint32(fdt, node, "clock-frequency", &freq);  in fpga_get_system_frequency()
175 		if (err >= 0) {  in fpga_get_system_frequency()
185 		err = fdt_get_reg_props_by_index(fdt, node, 0,  in fpga_get_system_frequency()
187 		if (err >= 0) {  in fpga_get_system_frequency()
222 	int node, err;  in fpga_dtb_update_clock()  local
231 	err = fdt_read_uint32(fdt, node, "clocks", &phandle);  in fpga_dtb_update_clock()
232 	if (err != 0) {  in fpga_dtb_update_clock()
245 	err = fdt_setprop_inplace(fdt, node,  in fpga_dtb_update_clock()
249 	if (err < 0) {  in fpga_dtb_update_clock()
263 	int slen, err;  in fpga_dtb_set_commandline()  local
298 	err = fdt_setprop(fdt, chosen, "bootargs",  in fpga_dtb_set_commandline()
300 	if (err != 0) {  in fpga_dtb_set_commandline()
301 		return err;  in fpga_dtb_set_commandline()
311 	int err;  in fpga_prepare_dtb()  local
313 	err = fdt_open_into(fdt, fdt, FPGA_MAX_DTB_SIZE);  in fpga_prepare_dtb()
314 	if (err < 0) {  in fpga_prepare_dtb()
315 		ERROR("cannot open devicetree at %p: %d\n", fdt, err);  in fpga_prepare_dtb()
327 		err = fpga_dtb_set_commandline(fdt, cmdline);  in fpga_prepare_dtb()
328 		if (err == 0) {  in fpga_prepare_dtb()
332 			ERROR("failed to put command line into DTB: %d\n", err);  in fpga_prepare_dtb()
336 	if (err < 0) {  in fpga_prepare_dtb()
337 		ERROR("Error %d extending Device Tree\n", err);  in fpga_prepare_dtb()
341 	err = fdt_add_cpus_node(fdt, FPGA_MAX_PE_PER_CPU,  in fpga_prepare_dtb()
345 	if (err == -EEXIST) {  in fpga_prepare_dtb()
348 		if (err < 0) {  in fpga_prepare_dtb()
349 			ERROR("Error %d creating the /cpus DT node\n", err);  in fpga_prepare_dtb()
356 			err = fdt_adjust_gic_redist(fdt, nr_cores,  in fpga_prepare_dtb()
359 			if (err < 0) {  in fpga_prepare_dtb()
360 				ERROR("Error %d fixing up GIC DT node\n", err);  in fpga_prepare_dtb()
387 	err = fdt_pack(fdt);  in fpga_prepare_dtb()
388 	if (err < 0) {  in fpga_prepare_dtb()
389 		ERROR("Failed to pack Device Tree at %p: error %d\n", fdt, err);  in fpga_prepare_dtb()