Lines Matching refs:lvl

179 	unsigned int lvl;  in psci_is_last_cpu_to_idle_at_pwrlvl()  local
189 for (lvl = PSCI_CPU_PWR_LVL + U(1); lvl < end_pwrlvl; lvl++) { in psci_is_last_cpu_to_idle_at_pwrlvl()
363 unsigned int lvl; in psci_update_req_local_pwr_states() local
371 for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= max_pwrlvl; lvl++) { in psci_update_req_local_pwr_states()
373 prev[lvl - 1U] = *psci_get_req_local_pwr_states(lvl, cpu_idx); in psci_update_req_local_pwr_states()
376 if (lvl <= end_pwrlvl) { in psci_update_req_local_pwr_states()
377 req_state = state_info->pwr_domain_state[lvl]; in psci_update_req_local_pwr_states()
381 psci_set_req_local_pwr_state(lvl, cpu_idx, req_state); in psci_update_req_local_pwr_states()
392 unsigned int lvl; in psci_restore_req_local_pwr_states() local
399 for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= max_pwrlvl; lvl++) { in psci_restore_req_local_pwr_states()
401 psci_set_req_local_pwr_state(lvl, cpu_idx, prev[lvl - 1U]); in psci_restore_req_local_pwr_states()
459 unsigned int parent_idx, lvl; in psci_get_target_local_pwr_states() local
466 for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= end_pwrlvl; lvl++) { in psci_get_target_local_pwr_states()
467 pd_state[lvl] = get_non_cpu_pd_node_local_state(parent_idx); in psci_get_target_local_pwr_states()
472 for (; lvl <= PLAT_MAX_PWR_LVL; lvl++) { in psci_get_target_local_pwr_states()
473 target_state->pwr_domain_state[lvl] = PSCI_LOCAL_STATE_RUN; in psci_get_target_local_pwr_states()
486 unsigned int parent_idx, lvl; in psci_set_target_local_pwr_states() local
500 for (lvl = 1U; lvl <= end_pwrlvl; lvl++) { in psci_set_target_local_pwr_states()
501 set_non_cpu_pd_node_local_state(parent_idx, pd_state[lvl]); in psci_set_target_local_pwr_states()
532 unsigned int parent_idx, lvl; in psci_set_pwr_domains_to_run() local
536 for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= end_pwrlvl; lvl++) { in psci_set_pwr_domains_to_run()
539 psci_set_req_local_pwr_state(lvl, in psci_set_pwr_domains_to_run()
577 unsigned int lvl, parent_idx; in psci_do_state_coordination() local
587 for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= end_pwrlvl; lvl++) { in psci_do_state_coordination()
590 psci_set_req_local_pwr_state(lvl, cpu_idx, in psci_do_state_coordination()
591 state_info->pwr_domain_state[lvl]); in psci_do_state_coordination()
595 plat_local_state_t const *req_states = psci_get_req_local_pwr_states(lvl, in psci_do_state_coordination()
603 target_state = plat_get_target_pwr_state(lvl, in psci_do_state_coordination()
607 state_info->pwr_domain_state[lvl] = target_state; in psci_do_state_coordination()
610 if (is_local_state_run(state_info->pwr_domain_state[lvl]) != 0) { in psci_do_state_coordination()
623 for (lvl = lvl + 1U; lvl <= end_pwrlvl; lvl++) { in psci_do_state_coordination()
624 psci_set_req_local_pwr_state(lvl, cpu_idx, in psci_do_state_coordination()
625 state_info->pwr_domain_state[lvl]); in psci_do_state_coordination()
626 state_info->pwr_domain_state[lvl] = PSCI_LOCAL_STATE_RUN; in psci_do_state_coordination()
656 unsigned int lvl, parent_idx; in psci_validate_state_coordination() local
671 for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= end_pwrlvl; lvl++) { in psci_validate_state_coordination()
674 req_states = psci_get_req_local_pwr_states(lvl, start_idx); in psci_validate_state_coordination()
681 target_state = plat_get_target_pwr_state(lvl, in psci_validate_state_coordination()
689 if (state_info->pwr_domain_state[lvl] != target_state) { in psci_validate_state_coordination()
705 lvl = state_info->last_at_pwrlvl; in psci_validate_state_coordination()
706 if (!psci_is_last_cpu_to_idle_at_pwrlvl(cpu_idx, lvl)) { in psci_validate_state_coordination()