177 static bool psci_is_last_cpu_to_idle_at_pwrlvl(unsigned int my_idx, unsigned int end_pwrlvl)  in psci_is_last_cpu_to_idle_at_pwrlvl()  argument
184 	if (end_pwrlvl == PSCI_CPU_PWR_LVL) {  in psci_is_last_cpu_to_idle_at_pwrlvl()
189 	for (lvl = PSCI_CPU_PWR_LVL + U(1); lvl < end_pwrlvl; lvl++) {  in psci_is_last_cpu_to_idle_at_pwrlvl()
358 void psci_update_req_local_pwr_states(unsigned int end_pwrlvl,  in psci_update_req_local_pwr_states()  argument
376 		if (lvl <= end_pwrlvl) {  in psci_update_req_local_pwr_states()
379 			req_state = state_info->pwr_domain_state[end_pwrlvl];  in psci_update_req_local_pwr_states()
456 void psci_get_target_local_pwr_states(unsigned int cpu_idx, unsigned int end_pwrlvl,  in psci_get_target_local_pwr_states()  argument
466 	for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= end_pwrlvl; lvl++) {  in psci_get_target_local_pwr_states()
483 void psci_set_target_local_pwr_states(unsigned int cpu_idx, unsigned int end_pwrlvl,  in psci_set_target_local_pwr_states()  argument
500 	for (lvl = 1U; lvl <= end_pwrlvl; lvl++) {  in psci_set_target_local_pwr_states()
530 void psci_set_pwr_domains_to_run(unsigned int cpu_idx, unsigned int end_pwrlvl)  in psci_set_pwr_domains_to_run()  argument
536 	for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= end_pwrlvl; lvl++) {  in psci_set_pwr_domains_to_run()
574 void psci_do_state_coordination(unsigned int cpu_idx, unsigned int end_pwrlvl,  in psci_do_state_coordination()  argument
582 	assert(end_pwrlvl <= PLAT_MAX_PWR_LVL);  in psci_do_state_coordination()
587 	for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= end_pwrlvl; lvl++) {  in psci_do_state_coordination()
623 	for (lvl = lvl + 1U; lvl <= end_pwrlvl; lvl++) {  in psci_do_state_coordination()
652 int psci_validate_state_coordination(unsigned int cpu_idx, unsigned int end_pwrlvl,  in psci_validate_state_coordination()  argument
662 	assert(end_pwrlvl <= PLAT_MAX_PWR_LVL);  in psci_validate_state_coordination()
669 	psci_update_req_local_pwr_states(end_pwrlvl, cpu_idx, state_info, prev);  in psci_validate_state_coordination()
671 	for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= end_pwrlvl; lvl++) {  in psci_validate_state_coordination()
829 void psci_acquire_pwr_domain_locks(unsigned int end_pwrlvl,  in psci_acquire_pwr_domain_locks()  argument
836 	for (level = PSCI_CPU_PWR_LVL + 1U; level <= end_pwrlvl; level++) {  in psci_acquire_pwr_domain_locks()
847 void psci_release_pwr_domain_locks(unsigned int end_pwrlvl,  in psci_release_pwr_domain_locks()  argument
854 	for (level = end_pwrlvl; level >= (PSCI_CPU_PWR_LVL + 1U); level--) {  in psci_release_pwr_domain_locks()
1011 	unsigned int end_pwrlvl;  in psci_warmboot_entrypoint()  local
1028 	end_pwrlvl = get_power_on_target_pwrlvl();  in psci_warmboot_entrypoint()
1031 	psci_get_parent_pwr_domain_nodes(cpu_idx, end_pwrlvl, parent_nodes);  in psci_warmboot_entrypoint()
1038 	psci_acquire_pwr_domain_locks(end_pwrlvl, parent_nodes);  in psci_warmboot_entrypoint()
1040 	psci_get_target_local_pwr_states(cpu_idx, end_pwrlvl, &state_info);  in psci_warmboot_entrypoint()
1085 	psci_set_pwr_domains_to_run(cpu_idx, end_pwrlvl);  in psci_warmboot_entrypoint()
1088 	psci_stats_update_pwr_up(cpu_idx, end_pwrlvl, &state_info);  in psci_warmboot_entrypoint()
1095 	psci_release_pwr_domain_locks(end_pwrlvl, parent_nodes);  in psci_warmboot_entrypoint()