lib/psci/psci_common.c

36  * power states requested by a CPU for power levels from level 1 to
38  * level 0 (PSCI_CPU_PWR_LVL) as the requested and the target power state for a
47  * states at each power level in a cache-line aligned per-domain memory,
79  * Check that the maximum power level supported by the platform makes sense
129  * Check that the maximum retention level supported by the platform is less
130  * than the maximum off level.
137  * is valid. If so, it returns the requested states for each power level.
281  * Routine to return the maximum power level to traverse to after a cpu has
291 	 * level. If it wasn't, the cpu is off so this will be PLAT_MAX_PWR_LVL.
300  * does not store the requested state for the CPU power level. Hence an
301  * assertion is added to prevent us from accessing the CPU power level.
337  * assertion is added to prevent us from accessing the CPU power level.
481  * states has been done for each power level.
557  * the target power level (end_pwrlvl). It updates the array of requested power
560  * Then, for each level (apart from the CPU level) until the 'end_pwrlvl', it
562  * that level is an ancestor. It passes this information to the platform to
563  * coordinate and return the target power state. If the target state for a level
564  * is RUN then subsequent levels are not considered. At the CPU level, state
568  * The 'state_info' is updated with the target state for each level between the
585 	/* For level 0, the requested state will be equivalent
593 		/* Get the requested power states for this power level */
600 		 * this power level and return the target local power state.
619 	 * the target power state is RUN at a power level < end_pwlvl.
637  * the target power level (end_pwrlvl), and ensures the requested power states
641  * Then, for each level (apart from the CPU level) until the 'end_pwrlvl', it
643  * that level is an ancestor. It passes this information to the platform to
672 		/* Get the requested power states for this power level */
678 		 * this power level and return the target local power state.
703 	 * specified power level.
723  * state is requested then no power level is turned off and the highest power
724  * level is placed in a standby/retention state.
726  * It also ensures that the state level X will enter is not shallower than the
727  * state level X + 1 will enter.
740 	/* Find the target suspend power level */
754 		 * While traversing from the highest power level to the lowest,
766 	/* Find the highest off power level */
776 	 * If this is not a request for a power down state then max off level
777 	 * has to be invalid and max retention level has to be a valid power
778 	 * level.
790  * This function finds the highest power level which will be powered down
807  * This functions finds the level of the highest power domain which will be
824  * This function is passed the highest level in the topology tree that the
826  * from the node index list in order of increasing power domain level in the
833 	unsigned int level;
835 	/* No locking required for level 0. Hence start locking from level 1 */
836 	for (level = PSCI_CPU_PWR_LVL + 1U; level <= end_pwrlvl; level++) {
837 		parent_idx = parent_nodes[level - 1U];
843  * This function is passed the highest level in the topology tree that the
845  * locks in order of decreasing power domain level in the range specified.
851 	unsigned int level;
853 	/* Unlock top down. No unlocking required for level 0. */
854 	for (level = end_pwrlvl; level >= (PSCI_CPU_PWR_LVL + 1U); level--) {
855 		parent_idx = parent_nodes[level - 1U];
1002  * traverses the node information and finds the highest power level powered
1004  * to power on that power level and power levels below it.
1007  * coherency at the interconnect level in addition to gic cpu interface.
1025 	 * Get the maximum power domain level to traverse to after this cpu
1034 	 * This function acquires the lock corresponding to each power level so
1092 	 * This loop releases the lock corresponding to each power level
1167 				psci_non_cpu_pd_nodes[idx].level,
1267 	 * the power level.