Lines Matching refs:U
13 #define GICFMU_ERRFR_LO U(0x000)
14 #define GICFMU_ERRFR_HI U(0x004)
15 #define GICFMU_ERRCTLR_LO U(0x008)
16 #define GICFMU_ERRCTLR_HI U(0x00C)
17 #define GICFMU_ERRSTATUS_LO U(0x010)
18 #define GICFMU_ERRSTATUS_HI U(0x014)
19 #define GICFMU_ERRGSR_LO U(0xE00)
20 #define GICFMU_ERRGSR_HI U(0xE04)
21 #define GICFMU_KEY U(0xEA0)
22 #define GICFMU_PINGCTLR U(0xEA4)
23 #define GICFMU_PINGNOW U(0xEA8)
24 #define GICFMU_SMEN U(0xEB0)
25 #define GICFMU_SMINJERR U(0xEB4)
26 #define GICFMU_PINGMASK_LO U(0xEC0)
27 #define GICFMU_PINGMASK_HI U(0xEC4)
28 #define GICFMU_STATUS U(0xF00)
29 #define GICFMU_ERRIDR U(0xFC8)
38 #define FMU_SMEN_BLK_SHIFT U(8)
39 #define FMU_SMEN_SMID_SHIFT U(24)
43 #define FMU_BLK_GICD U(0)
44 #define FMU_BLK_SPICOL U(1)
45 #define FMU_BLK_WAKERQ U(2)
46 #define FMU_BLK_ITS0 U(4)
47 #define FMU_BLK_ITS1 U(5)
48 #define FMU_BLK_ITS2 U(6)
49 #define FMU_BLK_ITS3 U(7)
50 #define FMU_BLK_ITS4 U(8)
51 #define FMU_BLK_ITS5 U(9)
52 #define FMU_BLK_ITS6 U(10)
53 #define FMU_BLK_ITS7 U(11)
54 #define FMU_BLK_PPI0 U(12)
55 #define FMU_BLK_PPI1 U(13)
56 #define FMU_BLK_PPI2 U(14)
57 #define FMU_BLK_PPI3 U(15)
58 #define FMU_BLK_PPI4 U(16)
59 #define FMU_BLK_PPI5 U(17)
60 #define FMU_BLK_PPI6 U(18)
61 #define FMU_BLK_PPI7 U(19)
62 #define FMU_BLK_PPI8 U(20)
63 #define FMU_BLK_PPI9 U(21)
64 #define FMU_BLK_PPI10 U(22)
65 #define FMU_BLK_PPI11 U(23)
66 #define FMU_BLK_PPI12 U(24)
67 #define FMU_BLK_PPI13 U(25)
68 #define FMU_BLK_PPI14 U(26)
69 #define FMU_BLK_PPI15 U(27)
70 #define FMU_BLK_PPI16 U(28)
71 #define FMU_BLK_PPI17 U(29)
72 #define FMU_BLK_PPI18 U(30)
73 #define FMU_BLK_PPI19 U(31)
74 #define FMU_BLK_PPI20 U(32)
75 #define FMU_BLK_PPI21 U(33)
76 #define FMU_BLK_PPI22 U(34)
77 #define FMU_BLK_PPI23 U(35)
78 #define FMU_BLK_PPI24 U(36)
79 #define FMU_BLK_PPI25 U(37)
80 #define FMU_BLK_PPI26 U(38)
81 #define FMU_BLK_PPI27 U(39)
82 #define FMU_BLK_PPI28 U(40)
83 #define FMU_BLK_PPI29 U(41)
84 #define FMU_BLK_PPI30 U(42)
85 #define FMU_BLK_PPI31 U(43)
86 #define FMU_BLK_PRESENT_MASK U(0xFFFFFFFFFFF)
89 #define FMU_SMID_GICD_MAX U(33)
90 #define FMU_SMID_PPI_MAX U(12)
91 #define FMU_SMID_ITS_MAX U(14)
92 #define FMU_SMID_SPICOL_MAX U(5)
93 #define FMU_SMID_WAKERQ_MAX U(2)
96 #define GICD_MBIST_REQ_ERROR U(23)
97 #define GICD_FMU_CLKGATE_ERROR U(33)
98 #define PPI_MBIST_REQ_ERROR U(10)
99 #define PPI_FMU_CLKGATE_ERROR U(12)
100 #define ITS_MBIST_REQ_ERROR U(13)
101 #define ITS_FMU_CLKGATE_ERROR U(14)
104 #define FMU_ERRSTATUS_BLKID_SHIFT U(32)
105 #define FMU_ERRSTATUS_BLKID_MASK U(0xFF)
112 #define FMU_ERRSTATUS_IERR_MASK U(0xFF)
113 #define FMU_ERRSTATUS_IERR_SHIFT U(8)
114 #define FMU_ERRSTATUS_SERR_MASK U(0xFF)
117 #define FMU_PINGCTLR_INTDIFF_SHIFT U(16)
118 #define FMU_PINGCTLR_TIMEOUTVAL_SHIFT U(4)