36 #define SMC_RET1(_h, _x0)	{				\  argument
37 	write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X0), (_x0));	\
40 #define SMC_RET2(_h, _x0, _x1)	{				\  argument
42 	SMC_RET1(_h, (_x0));					\
44 #define SMC_RET3(_h, _x0, _x1, _x2)	{			\  argument
46 	SMC_RET2(_h, (_x0), (_x1));				\
48 #define SMC_RET4(_h, _x0, _x1, _x2, _x3)	{		\  argument
50 	SMC_RET3(_h, (_x0), (_x1), (_x2));			\
52 #define SMC_RET5(_h, _x0, _x1, _x2, _x3, _x4)	{		\  argument
54 	SMC_RET4(_h, (_x0), (_x1), (_x2), (_x3));		\
56 #define SMC_RET6(_h, _x0, _x1, _x2, _x3, _x4, _x5)	{	\  argument
58 	SMC_RET5(_h, (_x0), (_x1), (_x2), (_x3), (_x4));	\
60 #define SMC_RET7(_h, _x0, _x1, _x2, _x3, _x4, _x5, _x6)	{	\  argument
62 	SMC_RET6(_h, (_x0), (_x1), (_x2), (_x3), (_x4), (_x5));	\
64 #define SMC_RET8(_h, _x0, _x1, _x2, _x3, _x4, _x5, _x6, _x7) {	\  argument
66 	SMC_RET7(_h, (_x0), (_x1), (_x2), (_x3), (_x4), (_x5), (_x6));	\
80 #define SMC_RET18(_h, _x0, _x1, _x2, _x3, _x4, _x5, _x6, _x7, _x8, _x9, \  argument
92 	SMC_RET8(_h, (_x0), (_x1), (_x2), (_x3), (_x4), (_x5), (_x6),	\