Lines Matching refs:x1
40 mov_imm x1, (SCTLR_I_BIT | SCTLR_A_BIT | SCTLR_SA_BIT)
45 orr x0, x0, x1
51 is_feat_sctlr2_present_asm x1
54 mov x1, #SCTLR2_RESET_VAL
55 msr SCTLR2_EL3, x1
87 mrs x1, id_aa64pfr0_el1
88 and x1, x1, #(ID_AA64PFR0_SEL2_MASK << ID_AA64PFR0_SEL2_SHIFT)
89 cbz x1, 1f
225 mov_imm x1, \_pie_fixup_size
226 add x1, x1, x0
313 adrp x1, __RW_END__
314 add x1, x1, :lo12:__RW_END__
315 sub x1, x1, x0
320 adrp x1, __NOBITS_END__
321 add x1, x1, :lo12:__NOBITS_END__
322 sub x1, x1, x0
328 adrp x1, __BL2_NOLOAD_END__
329 add x1, x1, :lo12:__BL2_NOLOAD_END__
330 sub x1, x1, x0
337 adrp x1, __PER_CPU_END__
338 add x1, x1, :lo12:__PER_CPU_END__
339 sub x1, x1, x0
341 mov x9, x1
364 mov x1, x9
378 adrp x1, __BSS_END__
379 add x1, x1, :lo12:__BSS_END__
380 sub x1, x1, x0
386 adrp x1, __COHERENT_RAM_END_UNALIGNED__
387 add x1, x1, :lo12: __COHERENT_RAM_END_UNALIGNED__
388 sub x1, x1, x0
398 adrp x1, __DATA_ROM_START__
399 add x1, x1, :lo12:__DATA_ROM_START__