36 static inline uint32_t psc_reg(uint32_t base, uint32_t id)  in psc_reg()  function
223 	pdctl = psc_read(dev, psc_reg(PSC_PDCTL_BASE, idx));  in ti_psc_pd_get()
231 		psc_write(dev, pdctl, psc_reg(PSC_PDCTL_BASE, idx));  in ti_psc_pd_get()
282 	pdctl = psc_read(dev, psc_reg(PSC_PDCTL_BASE, idx));  in ti_psc_pd_put()
288 		psc_write(dev, pdctl, psc_reg(PSC_PDCTL_BASE, idx));  in ti_psc_pd_put()
457 	mdctl = psc_read(dev, psc_reg(PSC_MDCTL_BASE, idx));  in lpsc_module_sync_state()
466 		psc_write(dev, mdctl, psc_reg(PSC_MDCTL_BASE, idx));  in lpsc_module_sync_state()
523 	state = (uint8_t)(psc_read(dev, psc_reg(PSC_MDSTAT_BASE, idx)) & MDSTAT_STATE_MASK);  in ti_lpsc_module_get_state()
551 	mdctl = psc_read(dev, psc_reg(PSC_MDCTL_BASE, idx));  in ti_lpsc_module_set_reset_iso()
561 		psc_write(dev, mdctl, psc_reg(PSC_MDCTL_BASE, idx));  in ti_lpsc_module_set_reset_iso()
575 		ret = (psc_read(dev, psc_reg(PSC_MDCTL_BASE, idx)) & MDCTL_RESET_ISO) != 0U;  in ti_lpsc_module_get_reset_iso()
594 	mdctl = psc_read(dev, (uint32_t) psc_reg(PSC_MDCTL_BASE, idx));  in ti_lpsc_module_set_local_reset()
608 		psc_write(dev, mdctl, psc_reg(PSC_MDCTL_BASE, idx));  in ti_lpsc_module_set_local_reset()
647 		ret = (psc_read(dev, (uint32_t) psc_reg(PSC_MDCTL_BASE, idx)) & MDCTL_LRST) == 0U;  in ti_lpsc_module_get_local_reset()
668 	while ((((psc_read(dev, psc_reg(PSC_MDSTAT_BASE, idx))) & MDSTAT_BUSY_MASK) != 0U) &&  in ti_lpsc_module_wait()
687 		while ((0U == ((psc_read(dev, psc_reg(PSC_MDSTAT_BASE, idx))) & mask)) &&  in ti_lpsc_module_wait()
929 		state = (uint8_t) psc_read(dev, psc_reg(PSC_PDSTAT_BASE, (uint32_t) idx));  in psc_initialize_pds()
1028 		while ((((psc_read(dev, psc_reg(PSC_MDSTAT_BASE,  in psc_initialize_modules()
1040 		val = psc_read(dev, psc_reg(PSC_MDSTAT_BASE, (uint32_t) idx));  in psc_initialize_modules()