161 static struct stm32_sdmmc2_params sdmmc2_params;  variable
175 	uintptr_t base = sdmmc2_params.reg_base;  in stm32_sdmmc2_init()
178 	if (sdmmc2_params.max_freq != 0U) {  in stm32_sdmmc2_init()
179 		freq = MIN(sdmmc2_params.max_freq, freq);  in stm32_sdmmc2_init()
182 	if (sdmmc2_params.vmmc_regu != NULL) {  in stm32_sdmmc2_init()
183 		ret = regulator_disable(sdmmc2_params.vmmc_regu);  in stm32_sdmmc2_init()
192 		      SDMMC_POWER_PWRCTRL_PWR_CYCLE | sdmmc2_params.dirpol);  in stm32_sdmmc2_init()
195 	if (sdmmc2_params.vmmc_regu != NULL) {  in stm32_sdmmc2_init()
196 		ret = regulator_enable(sdmmc2_params.vmmc_regu);  in stm32_sdmmc2_init()
204 	mmio_write_32(base + SDMMC_POWER, sdmmc2_params.dirpol);  in stm32_sdmmc2_init()
207 	clock_div = div_round_up(sdmmc2_params.clk_rate, freq * 2U);  in stm32_sdmmc2_init()
210 		      sdmmc2_params.negedge |  in stm32_sdmmc2_init()
211 		      sdmmc2_params.pin_ckin);  in stm32_sdmmc2_init()
214 		      SDMMC_POWER_PWRCTRL | sdmmc2_params.dirpol);  in stm32_sdmmc2_init()
237 	uintptr_t base = sdmmc2_params.reg_base;  in stm32_sdmmc2_send_cmd_req()
275 		if ((sdmmc2_params.device_info->mmc_dev_type == MMC_IS_SD_HC) &&  in stm32_sdmmc2_send_cmd_req()
278 			if (sdmmc2_params.use_dma) {  in stm32_sdmmc2_send_cmd_req()
289 		if (sdmmc2_params.device_info->mmc_dev_type == MMC_IS_EMMC) {  in stm32_sdmmc2_send_cmd_req()
299 		if (sdmmc2_params.use_dma) {  in stm32_sdmmc2_send_cmd_req()
312 		if (sdmmc2_params.use_dma) {  in stm32_sdmmc2_send_cmd_req()
483 	uintptr_t base = sdmmc2_params.reg_base;  in stm32_sdmmc2_set_ios()
486 	uint32_t clk_rate = sdmmc2_params.clk_rate;  in stm32_sdmmc2_set_ios()
487 	uint32_t max_bus_freq = sdmmc2_params.device_info->max_bus_freq;  in stm32_sdmmc2_set_ios()
503 	if (sdmmc2_params.device_info->mmc_dev_type == MMC_IS_EMMC) {  in stm32_sdmmc2_set_ios()
517 	if (sdmmc2_params.max_freq != 0U) {  in stm32_sdmmc2_set_ios()
518 		freq = MIN(sdmmc2_params.max_freq, max_freq);  in stm32_sdmmc2_set_ios()
527 		      sdmmc2_params.negedge |  in stm32_sdmmc2_set_ios()
528 		      sdmmc2_params.pin_ckin);  in stm32_sdmmc2_set_ios()
537 	uintptr_t base = sdmmc2_params.reg_base;  in stm32_sdmmc2_prepare()
549 	sdmmc2_params.use_dma = plat_sdmmc2_use_dma(base, buf);  in stm32_sdmmc2_prepare()
551 	if (sdmmc2_params.use_dma) {  in stm32_sdmmc2_prepare()
579 	if (sdmmc2_params.use_dma) {  in stm32_sdmmc2_prepare()
603 	uintptr_t base = sdmmc2_params.reg_base;  in stm32_sdmmc2_read()
613 	if (sdmmc2_params.use_dma) {  in stm32_sdmmc2_read()
708 						     sdmmc2_params.reg_base);  in stm32_sdmmc2_dt_get_config()
722 	sdmmc2_params.clock_id = dt_info.clock;  in stm32_sdmmc2_dt_get_config()
723 	sdmmc2_params.reset_id = dt_info.reset;  in stm32_sdmmc2_dt_get_config()
726 		sdmmc2_params.pin_ckin = SDMMC_CLKCR_SELCLKRX_0;  in stm32_sdmmc2_dt_get_config()
730 		sdmmc2_params.dirpol = SDMMC_POWER_DIRPOL;  in stm32_sdmmc2_dt_get_config()
734 		sdmmc2_params.negedge = SDMMC_CLKCR_NEGEDGE;  in stm32_sdmmc2_dt_get_config()
741 			sdmmc2_params.bus_width = MMC_BUS_WIDTH_4;  in stm32_sdmmc2_dt_get_config()
745 			sdmmc2_params.bus_width = MMC_BUS_WIDTH_8;  in stm32_sdmmc2_dt_get_config()
755 		sdmmc2_params.max_freq = fdt32_to_cpu(*cuint);  in stm32_sdmmc2_dt_get_config()
758 	sdmmc2_params.vmmc_regu = regulator_get_by_supply_name(fdt, sdmmc_node, "vmmc");  in stm32_sdmmc2_dt_get_config()
765 	return sdmmc2_params.device_info->device_size;  in stm32_sdmmc2_mmc_get_device_size()
776 	memcpy(&sdmmc2_params, params, sizeof(struct stm32_sdmmc2_params));  in stm32_sdmmc2_mmc_init()
778 	sdmmc2_params.vmmc_regu = NULL;  in stm32_sdmmc2_mmc_init()
785 	clk_enable(sdmmc2_params.clock_id);  in stm32_sdmmc2_mmc_init()
787 	if ((int)sdmmc2_params.reset_id >= 0) {  in stm32_sdmmc2_mmc_init()
790 		rc = stm32mp_reset_assert(sdmmc2_params.reset_id, TIMEOUT_US_1_MS);  in stm32_sdmmc2_mmc_init()
795 		rc = stm32mp_reset_deassert(sdmmc2_params.reset_id, TIMEOUT_US_1_MS);  in stm32_sdmmc2_mmc_init()
802 	sdmmc2_params.clk_rate = clk_get_rate(sdmmc2_params.clock_id);  in stm32_sdmmc2_mmc_init()
803 	sdmmc2_params.device_info->ocr_voltage = OCR_3_2_3_3 | OCR_3_3_3_4;  in stm32_sdmmc2_mmc_init()
805 	return mmc_init(&stm32_sdmmc2_ops, sdmmc2_params.clk_rate,  in stm32_sdmmc2_mmc_init()
806 			sdmmc2_params.bus_width, sdmmc2_params.flags,  in stm32_sdmmc2_mmc_init()
807 			sdmmc2_params.device_info);  in stm32_sdmmc2_mmc_init()