Lines Matching refs:i2c_base_addr
71 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR1, I2C_CR1_PE); in i2c_config_analog_filter()
74 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR1, I2C_CR1_ANFOFF); in i2c_config_analog_filter()
77 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR1, analog_filter); in i2c_config_analog_filter()
80 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR1, I2C_CR1_PE); in i2c_config_analog_filter()
154 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR1, I2C_CR1_PE); in stm32_i2c_init()
157 mmio_write_32(hi2c->i2c_base_addr + I2C_TIMINGR, in stm32_i2c_init()
161 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_OAR1, I2C_OAR1_OA1EN); in stm32_i2c_init()
165 mmio_write_32(hi2c->i2c_base_addr + I2C_OAR1, in stm32_i2c_init()
168 mmio_write_32(hi2c->i2c_base_addr + I2C_OAR1, in stm32_i2c_init()
173 mmio_write_32(hi2c->i2c_base_addr + I2C_CR2, 0); in stm32_i2c_init()
177 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR2, I2C_CR2_ADD10); in stm32_i2c_init()
184 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR2, in stm32_i2c_init()
188 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_OAR2, I2C_DUALADDRESS_ENABLE); in stm32_i2c_init()
191 mmio_write_32(hi2c->i2c_base_addr + I2C_OAR2, in stm32_i2c_init()
197 mmio_write_32(hi2c->i2c_base_addr + I2C_CR1, in stm32_i2c_init()
202 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR1, I2C_CR1_PE); in stm32_i2c_init()
233 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & I2C_FLAG_TXIS) != in i2c_flush_txdr()
235 mmio_write_32(hi2c->i2c_base_addr + I2C_TXDR, 0); in i2c_flush_txdr()
239 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & I2C_FLAG_TXE) == in i2c_flush_txdr()
241 mmio_setbits_32(hi2c->i2c_base_addr + I2C_ISR, in i2c_flush_txdr()
259 uint32_t isr = mmio_read_32(hi2c->i2c_base_addr + I2C_ISR); in i2c_wait_flag()
284 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & I2C_FLAG_AF) == 0U) { in i2c_ack_failed()
292 while ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & in i2c_ack_failed()
302 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_AF); in i2c_ack_failed()
304 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_STOPF); in i2c_ack_failed()
308 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR2, I2C_RESET_CR2); in i2c_ack_failed()
329 while ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & in i2c_wait_txis()
356 while ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & in i2c_wait_stop()
408 mmio_clrsetbits_32(hi2c->i2c_base_addr + I2C_CR2, clr_value, set_value); in i2c_transfer_config()
435 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_write()
439 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_write()
447 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_write()
482 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_read()
486 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_read()
494 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_read()
592 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, *p_buff); in i2c_write()
630 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_STOPF); in i2c_write()
632 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR2, I2C_RESET_CR2); in i2c_write()
763 *p_buff = mmio_read_8(hi2c->i2c_base_addr + I2C_RXDR); in i2c_read()
799 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_STOPF); in i2c_read()
801 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR2, I2C_RESET_CR2); in i2c_read()
880 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & I2C_FLAG_BUSY) != in stm32_i2c_is_device_ready()
892 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_OAR1) & in stm32_i2c_is_device_ready()
894 mmio_write_32(hi2c->i2c_base_addr + I2C_CR2, in stm32_i2c_is_device_ready()
899 mmio_write_32(hi2c->i2c_base_addr + I2C_CR2, in stm32_i2c_is_device_ready()
912 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & in stm32_i2c_is_device_ready()
923 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & in stm32_i2c_is_device_ready()
930 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, in stm32_i2c_is_device_ready()
943 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_AF); in stm32_i2c_is_device_ready()
945 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_STOPF); in stm32_i2c_is_device_ready()
948 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR2, in stm32_i2c_is_device_ready()
956 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, in stm32_i2c_is_device_ready()