Lines Matching refs:hi2c
45 static void notif_i2c_timeout(struct i2c_handle_s *hi2c) in notif_i2c_timeout() argument
47 hi2c->i2c_err |= I2C_ERROR_TIMEOUT; in notif_i2c_timeout()
48 hi2c->i2c_mode = I2C_MODE_NONE; in notif_i2c_timeout()
49 hi2c->i2c_state = I2C_STATE_READY; in notif_i2c_timeout()
59 static int i2c_config_analog_filter(struct i2c_handle_s *hi2c, in i2c_config_analog_filter() argument
62 if ((hi2c->i2c_state != I2C_STATE_READY) || (hi2c->lock != 0U)) { in i2c_config_analog_filter()
66 hi2c->lock = 1; in i2c_config_analog_filter()
68 hi2c->i2c_state = I2C_STATE_BUSY; in i2c_config_analog_filter()
71 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR1, I2C_CR1_PE); in i2c_config_analog_filter()
74 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR1, I2C_CR1_ANFOFF); in i2c_config_analog_filter()
77 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR1, analog_filter); in i2c_config_analog_filter()
80 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR1, I2C_CR1_PE); in i2c_config_analog_filter()
82 hi2c->i2c_state = I2C_STATE_READY; in i2c_config_analog_filter()
84 hi2c->lock = 0; in i2c_config_analog_filter()
135 int stm32_i2c_init(struct i2c_handle_s *hi2c, in stm32_i2c_init() argument
141 if (hi2c == NULL) { in stm32_i2c_init()
145 if (hi2c->i2c_state == I2C_STATE_RESET) { in stm32_i2c_init()
146 hi2c->lock = 0; in stm32_i2c_init()
149 hi2c->i2c_state = I2C_STATE_BUSY; in stm32_i2c_init()
151 clk_enable(hi2c->clock); in stm32_i2c_init()
154 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR1, I2C_CR1_PE); in stm32_i2c_init()
157 mmio_write_32(hi2c->i2c_base_addr + I2C_TIMINGR, in stm32_i2c_init()
161 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_OAR1, I2C_OAR1_OA1EN); in stm32_i2c_init()
165 mmio_write_32(hi2c->i2c_base_addr + I2C_OAR1, in stm32_i2c_init()
168 mmio_write_32(hi2c->i2c_base_addr + I2C_OAR1, in stm32_i2c_init()
173 mmio_write_32(hi2c->i2c_base_addr + I2C_CR2, 0); in stm32_i2c_init()
177 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR2, I2C_CR2_ADD10); in stm32_i2c_init()
184 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR2, in stm32_i2c_init()
188 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_OAR2, I2C_DUALADDRESS_ENABLE); in stm32_i2c_init()
191 mmio_write_32(hi2c->i2c_base_addr + I2C_OAR2, in stm32_i2c_init()
197 mmio_write_32(hi2c->i2c_base_addr + I2C_CR1, in stm32_i2c_init()
202 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR1, I2C_CR1_PE); in stm32_i2c_init()
204 hi2c->i2c_err = I2C_ERROR_NONE; in stm32_i2c_init()
205 hi2c->i2c_state = I2C_STATE_READY; in stm32_i2c_init()
206 hi2c->i2c_mode = I2C_MODE_NONE; in stm32_i2c_init()
208 rc = i2c_config_analog_filter(hi2c, init_data->analog_filter ? in stm32_i2c_init()
213 clk_disable(hi2c->clock); in stm32_i2c_init()
217 clk_disable(hi2c->clock); in stm32_i2c_init()
227 static void i2c_flush_txdr(struct i2c_handle_s *hi2c) in i2c_flush_txdr() argument
233 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & I2C_FLAG_TXIS) != in i2c_flush_txdr()
235 mmio_write_32(hi2c->i2c_base_addr + I2C_TXDR, 0); in i2c_flush_txdr()
239 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & I2C_FLAG_TXE) == in i2c_flush_txdr()
241 mmio_setbits_32(hi2c->i2c_base_addr + I2C_ISR, in i2c_flush_txdr()
255 static int i2c_wait_flag(struct i2c_handle_s *hi2c, uint32_t flag, in i2c_wait_flag() argument
259 uint32_t isr = mmio_read_32(hi2c->i2c_base_addr + I2C_ISR); in i2c_wait_flag()
266 notif_i2c_timeout(hi2c); in i2c_wait_flag()
267 hi2c->lock = 0; in i2c_wait_flag()
282 static int i2c_ack_failed(struct i2c_handle_s *hi2c, uint64_t timeout_ref) in i2c_ack_failed() argument
284 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & I2C_FLAG_AF) == 0U) { in i2c_ack_failed()
292 while ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & in i2c_ack_failed()
295 notif_i2c_timeout(hi2c); in i2c_ack_failed()
296 hi2c->lock = 0; in i2c_ack_failed()
302 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_AF); in i2c_ack_failed()
304 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_STOPF); in i2c_ack_failed()
306 i2c_flush_txdr(hi2c); in i2c_ack_failed()
308 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR2, I2C_RESET_CR2); in i2c_ack_failed()
310 hi2c->i2c_err |= I2C_ERROR_AF; in i2c_ack_failed()
311 hi2c->i2c_state = I2C_STATE_READY; in i2c_ack_failed()
312 hi2c->i2c_mode = I2C_MODE_NONE; in i2c_ack_failed()
314 hi2c->lock = 0; in i2c_ack_failed()
327 static int i2c_wait_txis(struct i2c_handle_s *hi2c, uint64_t timeout_ref) in i2c_wait_txis() argument
329 while ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & in i2c_wait_txis()
331 if (i2c_ack_failed(hi2c, timeout_ref) != 0) { in i2c_wait_txis()
336 notif_i2c_timeout(hi2c); in i2c_wait_txis()
337 hi2c->lock = 0; in i2c_wait_txis()
354 static int i2c_wait_stop(struct i2c_handle_s *hi2c, uint64_t timeout_ref) in i2c_wait_stop() argument
356 while ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & in i2c_wait_stop()
358 if (i2c_ack_failed(hi2c, timeout_ref) != 0) { in i2c_wait_stop()
363 notif_i2c_timeout(hi2c); in i2c_wait_stop()
364 hi2c->lock = 0; in i2c_wait_stop()
394 static void i2c_transfer_config(struct i2c_handle_s *hi2c, uint16_t dev_addr, in i2c_transfer_config() argument
408 mmio_clrsetbits_32(hi2c->i2c_base_addr + I2C_CR2, clr_value, set_value); in i2c_transfer_config()
422 static int i2c_request_memory_write(struct i2c_handle_s *hi2c, in i2c_request_memory_write() argument
426 i2c_transfer_config(hi2c, dev_addr, mem_add_size, I2C_RELOAD_MODE, in i2c_request_memory_write()
429 if (i2c_wait_txis(hi2c, timeout_ref) != 0) { in i2c_request_memory_write()
435 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_write()
439 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_write()
442 if (i2c_wait_txis(hi2c, timeout_ref) != 0) { in i2c_request_memory_write()
447 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_write()
451 if (i2c_wait_flag(hi2c, I2C_FLAG_TCR, 0, timeout_ref) != 0) { in i2c_request_memory_write()
469 static int i2c_request_memory_read(struct i2c_handle_s *hi2c, uint16_t dev_addr, in i2c_request_memory_read() argument
473 i2c_transfer_config(hi2c, dev_addr, mem_add_size, I2C_SOFTEND_MODE, in i2c_request_memory_read()
476 if (i2c_wait_txis(hi2c, timeout_ref) != 0) { in i2c_request_memory_read()
482 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_read()
486 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_read()
489 if (i2c_wait_txis(hi2c, timeout_ref) != 0) { in i2c_request_memory_read()
494 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_read()
498 if (i2c_wait_flag(hi2c, I2C_FLAG_TC, 0, timeout_ref) != 0) { in i2c_request_memory_read()
518 static int i2c_write(struct i2c_handle_s *hi2c, uint16_t dev_addr, in i2c_write() argument
533 if ((hi2c->i2c_state != I2C_STATE_READY) || (hi2c->lock != 0U)) { in i2c_write()
541 clk_enable(hi2c->clock); in i2c_write()
543 hi2c->lock = 1; in i2c_write()
546 if (i2c_wait_flag(hi2c, I2C_FLAG_BUSY, 1, timeout_ref) != 0) { in i2c_write()
550 hi2c->i2c_state = I2C_STATE_BUSY_TX; in i2c_write()
551 hi2c->i2c_mode = mode; in i2c_write()
552 hi2c->i2c_err = I2C_ERROR_NONE; in i2c_write()
558 if (i2c_request_memory_write(hi2c, dev_addr, mem_addr, in i2c_write()
565 i2c_transfer_config(hi2c, dev_addr, xfer_size, in i2c_write()
569 i2c_transfer_config(hi2c, dev_addr, xfer_size, in i2c_write()
576 i2c_transfer_config(hi2c, dev_addr, xfer_size, in i2c_write()
581 i2c_transfer_config(hi2c, dev_addr, xfer_size, in i2c_write()
588 if (i2c_wait_txis(hi2c, timeout_ref) != 0) { in i2c_write()
592 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, *p_buff); in i2c_write()
599 if (i2c_wait_flag(hi2c, I2C_FLAG_TCR, 0, in i2c_write()
606 i2c_transfer_config(hi2c, dev_addr, in i2c_write()
612 i2c_transfer_config(hi2c, dev_addr, in i2c_write()
626 if (i2c_wait_stop(hi2c, timeout_ref) != 0) { in i2c_write()
630 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_STOPF); in i2c_write()
632 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR2, I2C_RESET_CR2); in i2c_write()
634 hi2c->i2c_state = I2C_STATE_READY; in i2c_write()
635 hi2c->i2c_mode = I2C_MODE_NONE; in i2c_write()
640 hi2c->lock = 0; in i2c_write()
641 clk_disable(hi2c->clock); in i2c_write()
659 int stm32_i2c_mem_write(struct i2c_handle_s *hi2c, uint16_t dev_addr, in stm32_i2c_mem_write() argument
663 return i2c_write(hi2c, dev_addr, mem_addr, mem_add_size, in stm32_i2c_mem_write()
677 int stm32_i2c_master_transmit(struct i2c_handle_s *hi2c, uint16_t dev_addr, in stm32_i2c_master_transmit() argument
681 return i2c_write(hi2c, dev_addr, 0, 0, in stm32_i2c_master_transmit()
699 static int i2c_read(struct i2c_handle_s *hi2c, uint16_t dev_addr, in i2c_read() argument
714 if ((hi2c->i2c_state != I2C_STATE_READY) || (hi2c->lock != 0U)) { in i2c_read()
722 clk_enable(hi2c->clock); in i2c_read()
724 hi2c->lock = 1; in i2c_read()
727 if (i2c_wait_flag(hi2c, I2C_FLAG_BUSY, 1, timeout_ref) != 0) { in i2c_read()
731 hi2c->i2c_state = I2C_STATE_BUSY_RX; in i2c_read()
732 hi2c->i2c_mode = mode; in i2c_read()
733 hi2c->i2c_err = I2C_ERROR_NONE; in i2c_read()
737 if (i2c_request_memory_read(hi2c, dev_addr, mem_addr, in i2c_read()
750 i2c_transfer_config(hi2c, dev_addr, xfer_size, in i2c_read()
754 i2c_transfer_config(hi2c, dev_addr, xfer_size, in i2c_read()
759 if (i2c_wait_flag(hi2c, I2C_FLAG_RXNE, 0, timeout_ref) != 0) { in i2c_read()
763 *p_buff = mmio_read_8(hi2c->i2c_base_addr + I2C_RXDR); in i2c_read()
769 if (i2c_wait_flag(hi2c, I2C_FLAG_TCR, 0, in i2c_read()
776 i2c_transfer_config(hi2c, dev_addr, in i2c_read()
782 i2c_transfer_config(hi2c, dev_addr, in i2c_read()
795 if (i2c_wait_stop(hi2c, timeout_ref) != 0) { in i2c_read()
799 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_STOPF); in i2c_read()
801 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR2, I2C_RESET_CR2); in i2c_read()
803 hi2c->i2c_state = I2C_STATE_READY; in i2c_read()
804 hi2c->i2c_mode = I2C_MODE_NONE; in i2c_read()
809 hi2c->lock = 0; in i2c_read()
810 clk_disable(hi2c->clock); in i2c_read()
828 int stm32_i2c_mem_read(struct i2c_handle_s *hi2c, uint16_t dev_addr, in stm32_i2c_mem_read() argument
832 return i2c_read(hi2c, dev_addr, mem_addr, mem_add_size, in stm32_i2c_mem_read()
846 int stm32_i2c_master_receive(struct i2c_handle_s *hi2c, uint16_t dev_addr, in stm32_i2c_master_receive() argument
850 return i2c_read(hi2c, dev_addr, 0, 0, in stm32_i2c_master_receive()
864 bool stm32_i2c_is_device_ready(struct i2c_handle_s *hi2c, in stm32_i2c_is_device_ready() argument
871 if ((hi2c->i2c_state != I2C_STATE_READY) || (hi2c->lock != 0U)) { in stm32_i2c_is_device_ready()
875 clk_enable(hi2c->clock); in stm32_i2c_is_device_ready()
877 hi2c->lock = 1; in stm32_i2c_is_device_ready()
878 hi2c->i2c_mode = I2C_MODE_NONE; in stm32_i2c_is_device_ready()
880 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & I2C_FLAG_BUSY) != in stm32_i2c_is_device_ready()
885 hi2c->i2c_state = I2C_STATE_BUSY; in stm32_i2c_is_device_ready()
886 hi2c->i2c_err = I2C_ERROR_NONE; in stm32_i2c_is_device_ready()
892 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_OAR1) & in stm32_i2c_is_device_ready()
894 mmio_write_32(hi2c->i2c_base_addr + I2C_CR2, in stm32_i2c_is_device_ready()
899 mmio_write_32(hi2c->i2c_base_addr + I2C_CR2, in stm32_i2c_is_device_ready()
912 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & in stm32_i2c_is_device_ready()
918 notif_i2c_timeout(hi2c); in stm32_i2c_is_device_ready()
923 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & in stm32_i2c_is_device_ready()
925 if (i2c_wait_flag(hi2c, I2C_FLAG_STOPF, 0, in stm32_i2c_is_device_ready()
930 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, in stm32_i2c_is_device_ready()
933 hi2c->i2c_state = I2C_STATE_READY; in stm32_i2c_is_device_ready()
939 if (i2c_wait_flag(hi2c, I2C_FLAG_STOPF, 0, timeout_ref) != 0) { in stm32_i2c_is_device_ready()
943 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_AF); in stm32_i2c_is_device_ready()
945 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_STOPF); in stm32_i2c_is_device_ready()
948 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR2, in stm32_i2c_is_device_ready()
951 if (i2c_wait_flag(hi2c, I2C_FLAG_STOPF, 0, in stm32_i2c_is_device_ready()
956 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, in stm32_i2c_is_device_ready()
963 notif_i2c_timeout(hi2c); in stm32_i2c_is_device_ready()
966 hi2c->lock = 0; in stm32_i2c_is_device_ready()
967 clk_disable(hi2c->clock); in stm32_i2c_is_device_ready()