Lines Matching refs:stm32mp_ddrphyc_base

127 	mmio_write_32(stm32mp_ddrphyc_base() + DDRPHY_APBONLY0_MICROCONTMUXSEL, 0U);  in disable_phy_ddc()
128 	mmio_write_32(stm32mp_ddrphyc_base() + DDRPHY_DRTUB0_UCCLKHCLKENABLES,  in disable_phy_ddc()
133 	mmio_write_32(stm32mp_ddrphyc_base() + DDRPHY_INITENG0_P0_SEQ0BDISABLEFLAG6, 0xFFFFU);  in disable_phy_ddc()
136 	mmio_write_32(stm32mp_ddrphyc_base() + DDRPHY_DRTUB0_UCCLKHCLKENABLES,  in disable_phy_ddc()
138 	mmio_write_32(stm32mp_ddrphyc_base() + DDRPHY_APBONLY0_MICROCONTMUXSEL,  in disable_phy_ddc()
149 	mmio_write_32(stm32mp_ddrphyc_base() + DDRPHY_APBONLY0_MICROCONTMUXSEL, 0U);  in ddr_wait_lp3_mode()
150 	mmio_write_32(stm32mp_ddrphyc_base() + DDRPHY_DRTUB0_UCCLKHCLKENABLES,  in ddr_wait_lp3_mode()
156 		uint16_t phyinlpx = mmio_read_32(stm32mp_ddrphyc_base() +  in ddr_wait_lp3_mode()
172 	mmio_write_32(stm32mp_ddrphyc_base() + DDRPHY_DRTUB0_UCCLKHCLKENABLES, 0U);  in ddr_wait_lp3_mode()
174 	mmio_write_32(stm32mp_ddrphyc_base() + DDRPHY_DRTUB0_UCCLKHCLKENABLES,  in ddr_wait_lp3_mode()
177 	mmio_write_32(stm32mp_ddrphyc_base() + DDRPHY_APBONLY0_MICROCONTMUXSEL,  in ddr_wait_lp3_mode()