60 	DDRCTL_REG_REG(mstr),
471 	mmio_setbits_32((uintptr_t)&priv->ctl->mstr, DDRCTRL_MSTR_DLL_OFF_MODE);  in stm32mp1_ddr3_dll_off()
473 		(uintptr_t)&priv->ctl->mstr,  in stm32mp1_ddr3_dll_off()
474 		mmio_read_32((uintptr_t)&priv->ctl->mstr));  in stm32mp1_ddr3_dll_off()
562 	if ((config->c_reg.mstr & DDRCTRL_MSTR_DDR3) != 0U) {  in stm32mp1_ddr_init()
564 	} else if ((config->c_reg.mstr & DDRCTRL_MSTR_LPDDR2) != 0U) {  in stm32mp1_ddr_init()
566 	} else if ((config->c_reg.mstr & DDRCTRL_MSTR_LPDDR3) != 0U) {  in stm32mp1_ddr_init()
625 	if ((config->c_reg.mstr &  in stm32mp1_ddr_init()
629 		mmio_clrbits_32((uintptr_t)&priv->ctl->mstr,  in stm32mp1_ddr_init()
632 			(uintptr_t)&priv->ctl->mstr,  in stm32mp1_ddr_init()
633 			mmio_read_32((uintptr_t)&priv->ctl->mstr));  in stm32mp1_ddr_init()
662 	if ((config->c_reg.mstr &  in stm32mp1_ddr_init()
687 	if ((config->c_reg.mstr & DDRCTRL_MSTR_DDR3) != 0U) {  in stm32mp1_ddr_init()
716 	if ((config->c_reg.mstr & DDRCTRL_MSTR_DLL_OFF_MODE) != 0U) {  in stm32mp1_ddr_init()
742 	if ((config->c_reg.mstr & DDRCTRL_MSTR_DDR3) == 0U) {  in stm32mp1_ddr_init()