Lines Matching refs:DDRCTL_REG_TIMING

87 #define DDRCTL_REG_TIMING(x)	DDRCTL_REG(x, stm32mp1_ddrctrl_timing)  macro
89 	DDRCTL_REG_TIMING(rfshtmg),
90 	DDRCTL_REG_TIMING(dramtmg0),
91 	DDRCTL_REG_TIMING(dramtmg1),
92 	DDRCTL_REG_TIMING(dramtmg2),
93 	DDRCTL_REG_TIMING(dramtmg3),
94 	DDRCTL_REG_TIMING(dramtmg4),
95 	DDRCTL_REG_TIMING(dramtmg5),
96 	DDRCTL_REG_TIMING(dramtmg6),
97 	DDRCTL_REG_TIMING(dramtmg7),
98 	DDRCTL_REG_TIMING(dramtmg8),
99 	DDRCTL_REG_TIMING(dramtmg14),
100 	DDRCTL_REG_TIMING(odtcfg),