863 	uint16_t reg_pllxcr;  member
1190 		.reg_pllxcr = (_reg),\
1238 	uintptr_t pll_base = priv->base + pll->reg_pllxcr;  in clk_stm32_pll_config_vco()
1261 	uintptr_t pll_base = priv->base + pll->reg_pllxcr;  in clk_stm32_pll_config_csg()
1286 	uintptr_t pll_base = priv->base + pll->reg_pllxcr;  in clk_stm32_pll_config_out()
1421 	uintptr_t pll_base = priv->base + pll->reg_pllxcr;  in _clk_stm32_pll_is_enabled()
1428 	uintptr_t pll_base = priv->base + pll->reg_pllxcr;  in _clk_stm32_pll_set_on()
1437 	uintptr_t pll_base = priv->base + pll->reg_pllxcr;  in _clk_stm32_pll_set_off()
1449 	uintptr_t pll_base = priv->base + pll->reg_pllxcr;  in _clk_stm32_pll_wait_ready_on()
1456 			      pll->clk_id - _CK_PLL1 + 1, pll->reg_pllxcr, mmio_read_32(pll_base));  in _clk_stm32_pll_wait_ready_on()
1467 	uintptr_t pll_base = priv->base + pll->reg_pllxcr;  in _clk_stm32_pll_wait_ready_off()
1474 			      pll->clk_id - _CK_PLL1 + 1, pll->reg_pllxcr, mmio_read_32(pll_base));  in _clk_stm32_pll_wait_ready_off()
1512 	uintptr_t pll_base = priv->base + pll->reg_pllxcr;  in _clk_stm32_pll_init()
1680 		.reg_pllxcr = (_reg),\
1705 	uintptr_t pll_base = priv->base + pll->reg_pllxcr;  in clk_stm32_pll_recalc_rate()