st/clk/clk-stm32mp13.c

93 	_CK_HSE,  enumerator
195 	 _CK_OFF, _CK_LSE, _CK_LSI, _CK_HSE
199 	 _CK_HSI, _CK_HSE, _CK_CSI, _CK_LSI, _CK_LSE
203 	 _CKMPU, _CKAXI, _CKMLAHB, _PLL4P, _CK_HSE, _CK_HSI
207 	 _CK_HSI, _CK_HSE
211 	 _CK_HSI, _CK_HSE, _CK_CSI
215 	 _CK_HSI, _CK_HSE, _CK_CSI, _I2SCKIN
219 	 _CK_HSI, _CK_HSE, _PLL1P, _PLL1P_DIV
223 	 _CK_HSI, _CK_HSE, _PLL2P
227 	 _CK_HSI, _CK_HSE, _CK_CSI, _PLL3P
231 	 _CK_HSI, _CK_CSI, _CK_HSE, _CK_OFF
259 	 _PCLK6, _PLL4Q, _CK_HSI, _CK_CSI, _CK_HSE, _I2SCKIN
263 	 _PCLK6, _PLL4Q, _CK_HSI, _CK_CSI, _CK_HSE
267 	 _PCLK6, _PLL3Q, _CK_HSI, _CK_CSI, _PLL4Q, _CK_HSE
271 	 _PCLK6, _PLL3Q, _CK_HSI, _CK_CSI, _PLL4Q, _CK_HSE
275 	 _PCLK1, _PLL4Q, _CK_HSI, _CK_CSI, _CK_HSE
279 	 _PCLK1, _PLL4Q, _CK_HSI, _CK_CSI, _CK_HSE
283 	 _PCLK2, _PLL4Q, _CK_HSI, _CK_CSI, _CK_HSE
287 	 _PCLK1, _PLL4Q, _CK_HSI, _CK_CSI, _CK_HSE
315 	 _CK_HSE, _PLL3Q, _PLL4Q, _PLL4R
347 	 _CK_HSE, _PLL4R, _HSE_DIV2
368 	 _CK_HSI, _CK_HSE
924 	if (_clk_stm32_get_rate(priv, _CK_HSE) == 0U) {  in stm32_enable_oscillator_hse()
928 	clk_oscillator_set_bypass(priv, _CK_HSE, digbyp, bypass);  in stm32_enable_oscillator_hse()
930 	_clk_stm32_enable(priv, _CK_HSE);  in stm32_enable_oscillator_hse()
933 	clk_oscillator_check_bypass(priv, _CK_HSE, digbyp, bypass);  in stm32_enable_oscillator_hse()
936 	clk_oscillator_set_css(priv, _CK_HSE, css);  in stm32_enable_oscillator_hse()
1331 		input_freq = _clk_stm32_get_rate(priv, _CK_HSE);  in clk_compute_pll1_settings()
1658 	OSCILLATOR(OSC_HSE, _CK_HSE, "clk-hse", GATE_HSE, GATE_HSE_RDY,
1864 	CLK_OSC(_CK_HSE, CK_HSE, CLK_IS_ROOT, OSC_HSE),
1874 	STM32_DIV(_HSE_DIV, _NO_ID, _CK_HSE, 0, DIV_RTC),
1876 	FIXED_FACTOR(_HSE_DIV2, CK_HSE_DIV2, _CK_HSE, 1, 2),