Lines Matching refs:ret
1023 int ret; in stm32mp1_come_back_to_hsi() local
1027 ret = _clk_stm32_set_parent(priv, _CKMPU, _CK_HSI); in stm32mp1_come_back_to_hsi()
1028 if (ret != 0) { in stm32mp1_come_back_to_hsi()
1029 return ret; in stm32mp1_come_back_to_hsi()
1032 ret = _clk_stm32_set_parent(priv, _CKAXI, _CK_HSI); in stm32mp1_come_back_to_hsi()
1033 if (ret != 0) { in stm32mp1_come_back_to_hsi()
1034 return ret; in stm32mp1_come_back_to_hsi()
1037 ret = _clk_stm32_set_parent(priv, _CKMLAHB, _CK_HSI); in stm32mp1_come_back_to_hsi()
1038 if (ret != 0) { in stm32mp1_come_back_to_hsi()
1039 return ret; in stm32mp1_come_back_to_hsi()
1057 int ret; in stm32_clk_configure_clk() local
1064 ret = _clk_stm32_set_parent_by_index(priv, clk_id, sel); in stm32_clk_configure_clk()
1065 if (ret != 0) { in stm32_clk_configure_clk()
1066 return ret; in stm32_clk_configure_clk()
1094 int ret; in stm32_clk_dividers_configure() local
1100 ret = clk_stm32_set_div(priv, div_id, div_n); in stm32_clk_dividers_configure()
1101 if (ret != 0) { in stm32_clk_dividers_configure()
1102 return ret; in stm32_clk_dividers_configure()
1114 int ret; in stm32_clk_source_configure() local
1135 ret = stm32_clk_configure_mux(priv, cmd_data); in stm32_clk_source_configure()
1147 ret = stm32_clk_configure_clk(priv, cmd_data); in stm32_clk_source_configure()
1150 ret = -EINVAL; in stm32_clk_source_configure()
1154 if (ret != 0) { in stm32_clk_source_configure()
1155 return ret; in stm32_clk_source_configure()
1166 ret = stm32_clk_configure_mux(priv, CLK_CKPER_DISABLED); in stm32_clk_source_configure()
1167 if (ret != 0) { in stm32_clk_source_configure()
1168 return ret; in stm32_clk_source_configure()
1513 int ret = 0; in _clk_stm32_pll_init() local
1516 ret = stm32_clk_configure_mux(priv, pll_conf->vco.src); in _clk_stm32_pll_init()
1517 if (ret != 0) { in _clk_stm32_pll_init()
1518 return ret; in _clk_stm32_pll_init()
1538 ret = _clk_stm32_pll_enable(priv, pll); in _clk_stm32_pll_init()
1539 if (ret != 0) { in _clk_stm32_pll_init()
1540 return ret; in _clk_stm32_pll_init()
1588 int ret = 0; in stm32_clk_oscillators_wait_lse_ready() local
1591 ret = clk_oscillator_wait_ready_on(priv, _CK_LSE); in stm32_clk_oscillators_wait_lse_ready()
1594 return ret; in stm32_clk_oscillators_wait_lse_ready()
2026 int ret; in stm32mp1_init_clock_tree() local
2043 ret = stm32mp1_come_back_to_hsi(); in stm32mp1_init_clock_tree()
2044 if (ret != 0) { in stm32mp1_init_clock_tree()
2045 return ret; in stm32mp1_init_clock_tree()
2048 ret = stm32_clk_hsidiv_configure(priv); in stm32mp1_init_clock_tree()
2049 if (ret != 0) { in stm32mp1_init_clock_tree()
2050 return ret; in stm32mp1_init_clock_tree()
2053 ret = stm32_clk_stgen_configure(priv, _STGENC); in stm32mp1_init_clock_tree()
2054 if (ret != 0) { in stm32mp1_init_clock_tree()
2058 ret = stm32_clk_dividers_configure(priv); in stm32mp1_init_clock_tree()
2059 if (ret != 0) { in stm32mp1_init_clock_tree()
2063 ret = stm32_clk_pll_configure(priv); in stm32mp1_init_clock_tree()
2064 if (ret != 0) { in stm32mp1_init_clock_tree()
2069 ret = stm32_clk_oscillators_wait_lse_ready(priv); in stm32mp1_init_clock_tree()
2070 if (ret != 0) { in stm32mp1_init_clock_tree()
2075 ret = stm32_clk_source_configure(priv); in stm32mp1_init_clock_tree()
2076 if (ret != 0) { in stm32mp1_init_clock_tree()
2081 ret = stm32_clk_oscillators_lse_set_css(priv); in stm32mp1_init_clock_tree()
2082 if (ret != 0) { in stm32mp1_init_clock_tree()
2087 ret = stm32mp1_clk_check_usb_conflict(priv, usbphy_p, usbo_p); in stm32mp1_init_clock_tree()
2088 if (ret != 0) { in stm32mp1_init_clock_tree()
2089 return ret; in stm32mp1_init_clock_tree()
2093 ret = stm32_clk_stgen_configure(priv, _STGENC); in stm32mp1_init_clock_tree()
2094 if (ret != 0) { in stm32mp1_init_clock_tree()
2118 int ret = 0; in clk_stm32_parse_oscillator_fdt() local
2120 cchar = fdt_get_name(fdt, subnode, &ret); in clk_stm32_parse_oscillator_fdt()
2122 return ret; in clk_stm32_parse_oscillator_fdt()
2125 if (strncmp(cchar, name, (size_t)ret) || in clk_stm32_parse_oscillator_fdt()
2130 cuint = fdt_getprop(fdt, subnode, "clock-frequency", &ret); in clk_stm32_parse_oscillator_fdt()
2132 return ret; in clk_stm32_parse_oscillator_fdt()
2347 int ret; in stm32mp1_clk_init() local
2350 ret = clk_compute_pll1_settings(PLL1_NOMINAL_FREQ_IN_KHZ); in stm32mp1_clk_init()
2351 if (ret != 0) { in stm32mp1_clk_init()
2352 return ret; in stm32mp1_clk_init()
2355 ret = stm32mp1_init_clock_tree(); in stm32mp1_clk_init()
2356 if (ret != 0) { in stm32mp1_clk_init()
2357 return ret; in stm32mp1_clk_init()
2368 int ret; in stm32mp1_clk_probe() local
2370 ret = stm32_clk_parse_fdt(&stm32mp13_clock_pdata); in stm32mp1_clk_probe()
2371 if (ret != 0) { in stm32mp1_clk_probe()
2372 return ret; in stm32mp1_clk_probe()
2375 ret = clk_stm32_init(&stm32mp13_clock_data, base); in stm32mp1_clk_probe()
2377 return ret; in stm32mp1_clk_probe()