59 struct clk_oscillator_data *clk_oscillator_get_data(struct stm32_clk_priv *priv, int id)  in clk_oscillator_get_data()  argument
61 	const struct clk_stm32 *clk = _clk_get(priv, id);  in clk_oscillator_get_data()
65 	return &priv->osci_data[osc_id];  in clk_oscillator_get_data()
68 void clk_oscillator_set_bypass(struct stm32_clk_priv *priv, int id, bool digbyp, bool bypass)  in clk_oscillator_set_bypass()  argument
70 	struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id);  in clk_oscillator_set_bypass()
79 	address = priv->base + bypass_data->offset;  in clk_oscillator_set_bypass()
90 void clk_oscillator_set_css(struct stm32_clk_priv *priv, int id, bool css)  in clk_oscillator_set_css()  argument
92 	struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id);  in clk_oscillator_set_css()
101 	address = priv->base + css_data->offset;  in clk_oscillator_set_css()
108 void clk_oscillator_set_drive(struct stm32_clk_priv *priv, int id, uint8_t lsedrv)  in clk_oscillator_set_drive()  argument
110 	struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id);  in clk_oscillator_set_drive()
121 	address = priv->base + drive_data->offset;  in clk_oscillator_set_drive()
142 int clk_oscillator_wait_ready(struct stm32_clk_priv *priv, int id, bool ready_on)  in clk_oscillator_wait_ready()  argument
144 	struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id);  in clk_oscillator_wait_ready()
146 	return _clk_stm32_gate_wait_ready(priv, osc_data->gate_rdy_id, ready_on);  in clk_oscillator_wait_ready()
149 int clk_oscillator_wait_ready_on(struct stm32_clk_priv *priv, int id)  in clk_oscillator_wait_ready_on()  argument
151 	return clk_oscillator_wait_ready(priv, id, true);  in clk_oscillator_wait_ready_on()
154 int clk_oscillator_wait_ready_off(struct stm32_clk_priv *priv, int id)  in clk_oscillator_wait_ready_off()  argument
156 	return clk_oscillator_wait_ready(priv, id, false);  in clk_oscillator_wait_ready_off()
159 static int clk_gate_enable(struct stm32_clk_priv *priv, int id)  in clk_gate_enable()  argument
161 	const struct clk_stm32 *clk = _clk_get(priv, id);  in clk_gate_enable()
164 	mmio_setbits_32(priv->base + cfg->offset, BIT(cfg->bit_idx));  in clk_gate_enable()
169 static void clk_gate_disable(struct stm32_clk_priv *priv, int id)  in clk_gate_disable()  argument
171 	const struct clk_stm32 *clk = _clk_get(priv, id);  in clk_gate_disable()
174 	mmio_clrbits_32(priv->base + cfg->offset, BIT(cfg->bit_idx));  in clk_gate_disable()
177 static bool clk_gate_is_enabled(struct stm32_clk_priv *priv, int id)  in clk_gate_is_enabled()  argument
179 	const struct clk_stm32 *clk = _clk_get(priv, id);  in clk_gate_is_enabled()
182 	return ((mmio_read_32(priv->base + cfg->offset) & BIT(cfg->bit_idx)) != 0U);  in clk_gate_is_enabled()
191 void _clk_stm32_gate_disable(struct stm32_clk_priv *priv, uint16_t gate_id)  in _clk_stm32_gate_disable()  argument
193 	const struct gate_cfg *gate = &priv->gates[gate_id];  in _clk_stm32_gate_disable()
194 	uintptr_t addr = priv->base + gate->offset;  in _clk_stm32_gate_disable()
203 int _clk_stm32_gate_enable(struct stm32_clk_priv *priv, uint16_t gate_id)  in _clk_stm32_gate_enable()  argument
205 	const struct gate_cfg *gate = &priv->gates[gate_id];  in _clk_stm32_gate_enable()
206 	uintptr_t addr = priv->base + gate->offset;  in _clk_stm32_gate_enable()
218 const struct clk_stm32 *_clk_get(struct stm32_clk_priv *priv, int id)  in _clk_get()  argument
220 	if ((unsigned int)id < priv->num) {  in _clk_get()
221 		return &priv->clks[id];  in _clk_get()
227 static const struct stm32_clk_ops *_clk_get_ops(struct stm32_clk_priv *priv, int id)  in _clk_get_ops()  argument
229 	const struct clk_stm32 *clk = _clk_get(priv, id);  in _clk_get_ops()
233 	return priv->ops_array[clk->ops];  in _clk_get_ops()
278 int clk_mux_set_parent(struct stm32_clk_priv *priv, uint16_t pid, uint8_t sel)  in clk_mux_set_parent()  argument
280 	const struct parent_cfg *parents = &priv->parents[pid & MUX_PARENT_MASK];  in clk_mux_set_parent()
282 	uintptr_t address = priv->base + mux->offset;  in clk_mux_set_parent()
307 int _clk_stm32_set_parent(struct stm32_clk_priv *priv, int clk, int clkp)  in _clk_stm32_set_parent()  argument
314 	pid = priv->clks[clk].parent;  in _clk_stm32_set_parent()
320 	old_parent = _clk_stm32_get_parent(priv, clk);  in _clk_stm32_set_parent()
328 	parents = &priv->parents[pid & MUX_PARENT_MASK];  in _clk_stm32_set_parent()
332 			bool clk_was_enabled = _clk_stm32_is_enabled(priv, clk);  in _clk_stm32_set_parent()
336 			_clk_stm32_enable(priv, clkp);  in _clk_stm32_set_parent()
337 			_clk_stm32_enable(priv, old_parent);  in _clk_stm32_set_parent()
339 			err = clk_mux_set_parent(priv, pid, sel);  in _clk_stm32_set_parent()
341 			_clk_stm32_disable(priv, old_parent);  in _clk_stm32_set_parent()
344 				_clk_stm32_disable(priv, old_parent);  in _clk_stm32_set_parent()
346 				_clk_stm32_disable(priv, clkp);  in _clk_stm32_set_parent()
356 int clk_mux_get_parent(struct stm32_clk_priv *priv, uint32_t mux_id)  in clk_mux_get_parent()  argument
362 	if (mux_id >= priv->nb_parents) {  in clk_mux_get_parent()
366 	parent = &priv->parents[mux_id];  in clk_mux_get_parent()
371 	return (mmio_read_32(priv->base + mux->offset) & mask) >> mux->shift;  in clk_mux_get_parent()
374 int _clk_stm32_set_parent_by_index(struct stm32_clk_priv *priv, int clk, int sel)  in _clk_stm32_set_parent_by_index()  argument
378 	pid = priv->clks[clk].parent;  in _clk_stm32_set_parent_by_index()
384 	return clk_mux_set_parent(priv, pid, sel);  in _clk_stm32_set_parent_by_index()
387 int _clk_stm32_get_parent(struct stm32_clk_priv *priv, int clk_id)  in _clk_stm32_get_parent()  argument
389 	const struct stm32_clk_ops *ops = _clk_get_ops(priv, clk_id);  in _clk_stm32_get_parent()
394 	mux_id = priv->clks[clk_id].parent;  in _clk_stm32_get_parent()
404 	parent = &priv->parents[mux_id];  in _clk_stm32_get_parent()
407 		sel = ops->get_parent(priv, clk_id);  in _clk_stm32_get_parent()
409 		sel = clk_mux_get_parent(priv, mux_id);  in _clk_stm32_get_parent()
419 int _clk_stm32_get_parent_index(struct stm32_clk_priv *priv, int clk_id)  in _clk_stm32_get_parent_index()  argument
423 	mux_id = priv->clks[clk_id].parent;  in _clk_stm32_get_parent_index()
434 	return clk_mux_get_parent(priv, mux_id);  in _clk_stm32_get_parent_index()
437 int _clk_stm32_get_parent_by_index(struct stm32_clk_priv *priv, int clk_id, int idx)  in _clk_stm32_get_parent_by_index()  argument
442 	mux_id = priv->clks[clk_id].parent;  in _clk_stm32_get_parent_by_index()
452 	parent = &priv->parents[mux_id];  in _clk_stm32_get_parent_by_index()
461 int clk_get_index(struct stm32_clk_priv *priv, unsigned long binding_id)  in clk_get_index()  argument
465 	for (i = 0U; i < priv->num; i++) {  in clk_get_index()
466 		if (binding_id == priv->clks[i].binding) {  in clk_get_index()
474 unsigned long _clk_stm32_get_rate(struct stm32_clk_priv *priv, int id)  in _clk_stm32_get_rate()  argument
476 	const struct stm32_clk_ops *ops = _clk_get_ops(priv, id);  in _clk_stm32_get_rate()
479 	if ((unsigned int)id >= priv->num) {  in _clk_stm32_get_rate()
483 	parent = _clk_stm32_get_parent(priv, id);  in _clk_stm32_get_rate()
492 			prate = _clk_stm32_get_rate(priv, parent);  in _clk_stm32_get_rate()
495 		return ops->recalc_rate(priv, id, prate);  in _clk_stm32_get_rate()
502 	return _clk_stm32_get_rate(priv, parent);  in _clk_stm32_get_rate()
505 unsigned long _clk_stm32_get_parent_rate(struct stm32_clk_priv *priv, int id)  in _clk_stm32_get_parent_rate()  argument
507 	int parent_id = _clk_stm32_get_parent(priv, id);  in _clk_stm32_get_parent_rate()
513 	return _clk_stm32_get_rate(priv, parent_id);  in _clk_stm32_get_parent_rate()
516 static uint8_t _stm32_clk_get_flags(struct stm32_clk_priv *priv, int id)  in _stm32_clk_get_flags()  argument
518 	return priv->clks[id].flags;  in _stm32_clk_get_flags()
521 bool _stm32_clk_is_flags(struct stm32_clk_priv *priv, int id, uint8_t flag)  in _stm32_clk_is_flags()  argument
523 	if ((_stm32_clk_get_flags(priv, id) & flag) != 0U) {  in _stm32_clk_is_flags()
530 int clk_stm32_enable_call_ops(struct stm32_clk_priv *priv, uint16_t id)  in clk_stm32_enable_call_ops()  argument
532 	const struct stm32_clk_ops *ops = _clk_get_ops(priv, id);  in clk_stm32_enable_call_ops()
535 		ops->enable(priv, id);  in clk_stm32_enable_call_ops()
541 static int _clk_stm32_enable_core(struct stm32_clk_priv *priv, int id)  in _clk_stm32_enable_core()  argument
546 	if (priv->gate_refcounts[id] == 0U) {  in _clk_stm32_enable_core()
547 		parent = _clk_stm32_get_parent(priv, id);  in _clk_stm32_enable_core()
552 			ret = _clk_stm32_enable_core(priv, parent);  in _clk_stm32_enable_core()
557 		clk_stm32_enable_call_ops(priv, id);  in _clk_stm32_enable_core()
560 	priv->gate_refcounts[id]++;  in _clk_stm32_enable_core()
562 	if (priv->gate_refcounts[id] == UINT8_MAX) {  in _clk_stm32_enable_core()
570 int _clk_stm32_enable(struct stm32_clk_priv *priv, int id)  in _clk_stm32_enable()  argument
575 	ret = _clk_stm32_enable_core(priv, id);  in _clk_stm32_enable()
581 void clk_stm32_disable_call_ops(struct stm32_clk_priv *priv, uint16_t id)  in clk_stm32_disable_call_ops()  argument
583 	const struct stm32_clk_ops *ops = _clk_get_ops(priv, id);  in clk_stm32_disable_call_ops()
586 		ops->disable(priv, id);  in clk_stm32_disable_call_ops()
590 static void _clk_stm32_disable_core(struct stm32_clk_priv *priv, int id)  in _clk_stm32_disable_core()  argument
594 	if ((priv->gate_refcounts[id] == 1U) && _stm32_clk_is_flags(priv, id, CLK_IS_CRITICAL)) {  in _clk_stm32_disable_core()
598 	if (priv->gate_refcounts[id] == 0U) {  in _clk_stm32_disable_core()
600 		if (_clk_stm32_is_enabled(priv, id)) {  in _clk_stm32_disable_core()
601 			clk_stm32_disable_call_ops(priv, id);  in _clk_stm32_disable_core()
608 	if (--priv->gate_refcounts[id] > 0U) {  in _clk_stm32_disable_core()
612 	clk_stm32_disable_call_ops(priv, id);  in _clk_stm32_disable_core()
614 	parent = _clk_stm32_get_parent(priv, id);  in _clk_stm32_disable_core()
616 		_clk_stm32_disable_core(priv, parent);  in _clk_stm32_disable_core()
620 void _clk_stm32_disable(struct stm32_clk_priv *priv, int id)  in _clk_stm32_disable()  argument
624 	_clk_stm32_disable_core(priv, id);  in _clk_stm32_disable()
629 bool _clk_stm32_is_enabled(struct stm32_clk_priv *priv, int id)  in _clk_stm32_is_enabled()  argument
631 	const struct stm32_clk_ops *ops = _clk_get_ops(priv, id);  in _clk_stm32_is_enabled()
634 		return ops->is_enabled(priv, id);  in _clk_stm32_is_enabled()
637 	return priv->gate_refcounts[id];  in _clk_stm32_is_enabled()
642 	struct stm32_clk_priv *priv = clk_stm32_get_priv();  in clk_stm32_enable()  local
645 	id = clk_get_index(priv, binding_id);  in clk_stm32_enable()
650 	return _clk_stm32_enable(priv, id);  in clk_stm32_enable()
655 	struct stm32_clk_priv *priv = clk_stm32_get_priv();  in clk_stm32_disable()  local
658 	id = clk_get_index(priv, binding_id);  in clk_stm32_disable()
660 		_clk_stm32_disable(priv, id);  in clk_stm32_disable()
666 	struct stm32_clk_priv *priv = clk_stm32_get_priv();  in clk_stm32_is_enabled()  local
669 	id = clk_get_index(priv, binding_id);  in clk_stm32_is_enabled()
674 	return _clk_stm32_is_enabled(priv, id);  in clk_stm32_is_enabled()
679 	struct stm32_clk_priv *priv = clk_stm32_get_priv();  in clk_stm32_get_rate()  local
682 	id = clk_get_index(priv, binding_id);  in clk_stm32_get_rate()
687 	return _clk_stm32_get_rate(priv, id);  in clk_stm32_get_rate()
692 	struct stm32_clk_priv *priv = clk_stm32_get_priv();  in clk_stm32_get_parent()  local
695 	id = clk_get_index(priv, binding_id);  in clk_stm32_get_parent()
700 	return _clk_stm32_get_parent(priv, id);  in clk_stm32_get_parent()
713 	struct stm32_clk_priv *priv = clk_stm32_get_priv();  in clk_stm32_enable_critical_clocks()  local
716 	for (i = 0U; i < priv->num; i++) {  in clk_stm32_enable_critical_clocks()
717 		if (_stm32_clk_is_flags(priv, i, CLK_IS_CRITICAL)) {  in clk_stm32_enable_critical_clocks()
718 			_clk_stm32_enable(priv, i);  in clk_stm32_enable_critical_clocks()
728 uint32_t clk_stm32_div_get_value(struct stm32_clk_priv *priv, int div_id)  in clk_stm32_div_get_value()  argument
730 	const struct div_cfg *divider = &priv->div[div_id];  in clk_stm32_div_get_value()
733 	val = mmio_read_32(priv->base + divider->offset) >> divider->shift;  in clk_stm32_div_get_value()
739 unsigned long _clk_stm32_divider_recalc(struct stm32_clk_priv *priv,  in _clk_stm32_divider_recalc()  argument
743 	const struct div_cfg *divider = &priv->div[div_id];  in _clk_stm32_divider_recalc()
744 	uint32_t val = clk_stm32_div_get_value(priv, div_id);  in _clk_stm32_divider_recalc()
755 unsigned long clk_stm32_divider_recalc(struct stm32_clk_priv *priv, int id,  in clk_stm32_divider_recalc()  argument
758 	const struct clk_stm32 *clk = _clk_get(priv, id);  in clk_stm32_divider_recalc()
761 	return _clk_stm32_divider_recalc(priv, div_cfg->id, prate);  in clk_stm32_divider_recalc()
768 int clk_stm32_set_div(struct stm32_clk_priv *priv, uint32_t div_id, uint32_t value)  in clk_stm32_set_div()  argument
775 	if (div_id >= priv->nb_div) {  in clk_stm32_set_div()
779 	divider = &priv->div[div_id];  in clk_stm32_set_div()
780 	address = priv->base + divider->offset;  in clk_stm32_set_div()
801 int _clk_stm32_gate_wait_ready(struct stm32_clk_priv *priv, uint16_t gate_id,  in _clk_stm32_gate_wait_ready()  argument
804 	const struct gate_cfg *gate = &priv->gates[gate_id];  in _clk_stm32_gate_wait_ready()
805 	uintptr_t address = priv->base + gate->offset;  in _clk_stm32_gate_wait_ready()
831 int clk_stm32_gate_enable(struct stm32_clk_priv *priv, int id)  in clk_stm32_gate_enable()  argument
833 	const struct clk_stm32 *clk = _clk_get(priv, id);  in clk_stm32_gate_enable()
835 	const struct gate_cfg *gate = &priv->gates[cfg->id];  in clk_stm32_gate_enable()
836 	uintptr_t addr = priv->base + gate->offset;  in clk_stm32_gate_enable()
848 void clk_stm32_gate_disable(struct stm32_clk_priv *priv, int id)  in clk_stm32_gate_disable()  argument
850 	const struct clk_stm32 *clk = _clk_get(priv, id);  in clk_stm32_gate_disable()
852 	const struct gate_cfg *gate = &priv->gates[cfg->id];  in clk_stm32_gate_disable()
853 	uintptr_t addr = priv->base + gate->offset;  in clk_stm32_gate_disable()
862 bool _clk_stm32_gate_is_enabled(struct stm32_clk_priv *priv, int gate_id)  in _clk_stm32_gate_is_enabled()  argument
867 	gate = &priv->gates[gate_id];  in _clk_stm32_gate_is_enabled()
868 	addr = priv->base + gate->offset;  in _clk_stm32_gate_is_enabled()
873 bool clk_stm32_gate_is_enabled(struct stm32_clk_priv *priv, int id)  in clk_stm32_gate_is_enabled()  argument
875 	const struct clk_stm32 *clk = _clk_get(priv, id);  in clk_stm32_gate_is_enabled()
878 	return _clk_stm32_gate_is_enabled(priv, cfg->id);  in clk_stm32_gate_is_enabled()
891 unsigned long fixed_factor_recalc_rate(struct stm32_clk_priv *priv,  in fixed_factor_recalc_rate()  argument
894 	const struct clk_stm32 *clk = _clk_get(priv, id);  in fixed_factor_recalc_rate()
911 static unsigned long timer_recalc_rate(struct stm32_clk_priv *priv,  in timer_recalc_rate()  argument
914 	const struct clk_stm32 *clk = _clk_get(priv, id);  in timer_recalc_rate()
917 	uintptr_t rcc_base = priv->base;  in timer_recalc_rate()
936 static unsigned long clk_fixed_rate_recalc(struct stm32_clk_priv *priv, int id,  in clk_fixed_rate_recalc()  argument
939 	const struct clk_stm32 *clk = _clk_get(priv, id);  in clk_fixed_rate_recalc()
949 static unsigned long clk_stm32_osc_recalc_rate(struct stm32_clk_priv *priv,  in clk_stm32_osc_recalc_rate()  argument
952 	struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id);  in clk_stm32_osc_recalc_rate()
957 bool clk_stm32_osc_gate_is_enabled(struct stm32_clk_priv *priv, int id)  in clk_stm32_osc_gate_is_enabled()  argument
959 	struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id);  in clk_stm32_osc_gate_is_enabled()
965 	return _clk_stm32_gate_is_enabled(priv, osc_data->gate_id);  in clk_stm32_osc_gate_is_enabled()
969 int clk_stm32_osc_gate_enable(struct stm32_clk_priv *priv, int id)  in clk_stm32_osc_gate_enable()  argument
971 	struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id);  in clk_stm32_osc_gate_enable()
977 	_clk_stm32_gate_enable(priv, osc_data->gate_id);  in clk_stm32_osc_gate_enable()
979 	if (_clk_stm32_gate_wait_ready(priv, osc_data->gate_rdy_id, true) != 0U) {  in clk_stm32_osc_gate_enable()
987 void clk_stm32_osc_gate_disable(struct stm32_clk_priv *priv, int id)  in clk_stm32_osc_gate_disable()  argument
989 	struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id);  in clk_stm32_osc_gate_disable()
995 	_clk_stm32_gate_disable(priv, osc_data->gate_id);  in clk_stm32_osc_gate_disable()
997 	if (_clk_stm32_gate_wait_ready(priv, osc_data->gate_rdy_id, false) != 0U) {  in clk_stm32_osc_gate_disable()
1044 void clk_stm32_osc_init(struct stm32_clk_priv *priv, int id)  in clk_stm32_osc_init()  argument
1046 	struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id);  in clk_stm32_osc_init()
1088 int clk_stm32_init(struct stm32_clk_priv *priv, uintptr_t base)  in clk_stm32_init()  argument
1092 	stm32_clock_data = priv;  in clk_stm32_init()
1094 	priv->base = base;  in clk_stm32_init()
1096 	for (i = 0U; i < priv->num; i++) {  in clk_stm32_init()
1097 		const struct stm32_clk_ops *ops = _clk_get_ops(priv, i);  in clk_stm32_init()
1100 			ops->init(priv, i);  in clk_stm32_init()