193 	const struct gate_cfg *gate = &priv->gates[gate_id];  in _clk_stm32_gate_disable()  local
194 	uintptr_t addr = priv->base + gate->offset;  in _clk_stm32_gate_disable()
196 	if (gate->set_clr != 0U) {  in _clk_stm32_gate_disable()
197 		mmio_write_32(addr + RCC_MP_ENCLRR_OFFSET, BIT(gate->bit_idx));  in _clk_stm32_gate_disable()
199 		mmio_clrbits_32(addr, BIT(gate->bit_idx));  in _clk_stm32_gate_disable()
205 	const struct gate_cfg *gate = &priv->gates[gate_id];  in _clk_stm32_gate_enable()  local
206 	uintptr_t addr = priv->base + gate->offset;  in _clk_stm32_gate_enable()
208 	if (gate->set_clr != 0U) {  in _clk_stm32_gate_enable()
209 		mmio_write_32(addr, BIT(gate->bit_idx));  in _clk_stm32_gate_enable()
212 		mmio_setbits_32(addr, BIT(gate->bit_idx));  in _clk_stm32_gate_enable()
804 	const struct gate_cfg *gate = &priv->gates[gate_id];  in _clk_stm32_gate_wait_ready()  local
805 	uintptr_t address = priv->base + gate->offset;  in _clk_stm32_gate_wait_ready()
806 	uint32_t mask_rdy = BIT(gate->bit_idx);  in _clk_stm32_gate_wait_ready()
811 		mask_test = BIT(gate->bit_idx);  in _clk_stm32_gate_wait_ready()
835 	const struct gate_cfg *gate = &priv->gates[cfg->id];  in clk_stm32_gate_enable()  local
836 	uintptr_t addr = priv->base + gate->offset;  in clk_stm32_gate_enable()
838 	if (gate->set_clr != 0U) {  in clk_stm32_gate_enable()
839 		mmio_write_32(addr, BIT(gate->bit_idx));  in clk_stm32_gate_enable()
842 		mmio_setbits_32(addr, BIT(gate->bit_idx));  in clk_stm32_gate_enable()
852 	const struct gate_cfg *gate = &priv->gates[cfg->id];  in clk_stm32_gate_disable()  local
853 	uintptr_t addr = priv->base + gate->offset;  in clk_stm32_gate_disable()
855 	if (gate->set_clr != 0U) {  in clk_stm32_gate_disable()
856 		mmio_write_32(addr + RCC_MP_ENCLRR_OFFSET, BIT(gate->bit_idx));  in clk_stm32_gate_disable()
858 		mmio_clrbits_32(addr, BIT(gate->bit_idx));  in clk_stm32_gate_disable()
864 	const struct gate_cfg *gate;  in _clk_stm32_gate_is_enabled()  local
867 	gate = &priv->gates[gate_id];  in _clk_stm32_gate_is_enabled()
868 	addr = priv->base + gate->offset;  in _clk_stm32_gate_is_enabled()
870 	return ((mmio_read_32(addr) & BIT(gate->bit_idx)) != 0U);  in _clk_stm32_gate_is_enabled()