Lines Matching refs:parent

314 	pid = priv->clks[clk].parent;  in _clk_stm32_set_parent()
358 const struct parent_cfg *parent; in clk_mux_get_parent() local
366 parent = &priv->parents[mux_id]; in clk_mux_get_parent()
367 mux = parent->mux; in clk_mux_get_parent()
378 pid = priv->clks[clk].parent; in _clk_stm32_set_parent_by_index()
390 const struct parent_cfg *parent; in _clk_stm32_get_parent() local
394 mux_id = priv->clks[clk_id].parent; in _clk_stm32_get_parent()
404 parent = &priv->parents[mux_id]; in _clk_stm32_get_parent()
412 if ((sel >= 0) && (sel < parent->num_parents)) { in _clk_stm32_get_parent()
413 return parent->id_parents[sel]; in _clk_stm32_get_parent()
423 mux_id = priv->clks[clk_id].parent; in _clk_stm32_get_parent_index()
439 const struct parent_cfg *parent; in _clk_stm32_get_parent_by_index() local
442 mux_id = priv->clks[clk_id].parent; in _clk_stm32_get_parent_by_index()
452 parent = &priv->parents[mux_id]; in _clk_stm32_get_parent_by_index()
454 if (idx < parent->num_parents) { in _clk_stm32_get_parent_by_index()
455 return parent->id_parents[idx]; in _clk_stm32_get_parent_by_index()
477 int parent; in _clk_stm32_get_rate() local
483 parent = _clk_stm32_get_parent(priv, id); in _clk_stm32_get_rate()
484 if (parent < 0) { in _clk_stm32_get_rate()
491 if (parent != CLK_IS_ROOT) { in _clk_stm32_get_rate()
492 prate = _clk_stm32_get_rate(priv, parent); in _clk_stm32_get_rate()
498 if (parent == CLK_IS_ROOT) { in _clk_stm32_get_rate()
502 return _clk_stm32_get_rate(priv, parent); in _clk_stm32_get_rate()
543 int parent; in _clk_stm32_enable_core() local
547 parent = _clk_stm32_get_parent(priv, id); in _clk_stm32_enable_core()
548 if (parent < 0) { in _clk_stm32_enable_core()
549 return parent; in _clk_stm32_enable_core()
551 if (parent != CLK_IS_ROOT) { in _clk_stm32_enable_core()
552 ret = _clk_stm32_enable_core(priv, parent); in _clk_stm32_enable_core()
592 int parent; in _clk_stm32_disable_core() local
614 parent = _clk_stm32_get_parent(priv, id); in _clk_stm32_disable_core()
615 if ((parent >= 0) && (parent != CLK_IS_ROOT)) { in _clk_stm32_disable_core()
616 _clk_stm32_disable_core(priv, parent); in _clk_stm32_disable_core()