Lines Matching refs:trdc_base
17 int trdc_mda_set_cpu(uintptr_t trdc_base, uint32_t mda_inst, in trdc_mda_set_cpu() argument
21 uint32_t val = mmio_read_32(trdc_base + MDAC_W_X(mda_inst, mda_reg)); in trdc_mda_set_cpu()
30 mmio_write_32(trdc_base + MDAC_W_X(mda_inst, mda_reg), val); in trdc_mda_set_cpu()
35 int trdc_mda_set_noncpu(uintptr_t trdc_base, uint32_t mda_inst, in trdc_mda_set_noncpu() argument
39 uint32_t val = mmio_read_32(trdc_base + MDAC_W_X(mda_inst, 0)); in trdc_mda_set_noncpu()
49 mmio_write_32(trdc_base + MDAC_W_X(mda_inst, 0), val); in trdc_mda_set_noncpu()
56 struct trdc_mgr *trdc_base = (struct trdc_mgr *)trdc_reg; in trdc_get_mbc_base() local
57 uint32_t mbc_num = MBC_NUM(trdc_base->trdc_hwcfg0); in trdc_get_mbc_base()
68 struct trdc_mgr *trdc_base = (struct trdc_mgr *)trdc_reg; in trdc_get_mrc_base() local
69 uint32_t mbc_num = MBC_NUM(trdc_base->trdc_hwcfg0); in trdc_get_mrc_base()
70 uint32_t mrc_num = MRC_NUM(trdc_base->trdc_hwcfg0); in trdc_get_mrc_base()
247 static bool is_trdc_mgr_slot(uintptr_t trdc_base, uint8_t mbc_id, in is_trdc_mgr_slot() argument
253 if (trdc_mgr_blks[i].trdc_base == trdc_base) { in is_trdc_mgr_slot()
278 if (trdc_mbc_enabled(mgr->trdc_base)) { in trdc_mgr_mbc_setup()
280 trdc_mbc_set_control(mgr->trdc_base, mgr->mbc_id, 7, 0x6000); in trdc_mgr_mbc_setup()
282 trdc_mbc_blk_config(mgr->trdc_base, mgr->mbc_id, i, in trdc_mgr_mbc_setup()
285 trdc_mbc_blk_config(mgr->trdc_base, mgr->mbc_id, i, in trdc_mgr_mbc_setup()
301 if (trdc_mrc_enabled(cfg->trdc_base)) { in trdc_setup()
304 trdc_mrc_set_control(cfg->trdc_base, in trdc_setup()
312 trdc_mrc_rgn_config(cfg->trdc_base, cfg->mrc_cfg[i].mrc_id, in trdc_setup()
323 if (trdc_mbc_enabled(cfg->trdc_base)) { in trdc_setup()
326 trdc_mbc_set_control(cfg->trdc_base, in trdc_setup()
334 num = trdc_mbc_blk_num(cfg->trdc_base, in trdc_setup()
340 is_mgr = is_trdc_mgr_slot(cfg->trdc_base, in trdc_setup()
347 trdc_mbc_blk_config(cfg->trdc_base, in trdc_setup()
355 trdc_mbc_blk_config(cfg->trdc_base, in trdc_setup()