13 static uint32_t ddrc_init_cfg(const struct ddrss_config *config)  in ddrc_init_cfg()  argument
15 	return load_register_cfg(config->ddrc_size, config->ddrc);  in ddrc_init_cfg()
19 static uint32_t execute_2d_training(const struct ddrss_config *config)  in execute_2d_training()  argument
25 	ret = load_phy_image(IMEM_START_ADDR, config->imem_2d_size,  in execute_2d_training()
26 			     config->imem_2d);  in execute_2d_training()
34 	ret = load_phy_image(DMEM_START_ADDR, config->dmem_2d_size,  in execute_2d_training()
35 			     config->dmem_2d);  in execute_2d_training()
51 	if (config->memory_type == (uint8_t)LPDDR4) {  in execute_2d_training()
62 static uint32_t execute_training(const struct ddrss_config *config)  in execute_training()  argument
67 	ret = load_dq_cfg(config->dq_swap_size, config->dq_swap);  in execute_training()
73 	ret = load_register_cfg_16(config->phy_size, config->phy);  in execute_training()
79 	set_optimal_pll(config->frequency);  in execute_training()
83 	ret = load_phy_image(IMEM_START_ADDR, config->imem_1d_size,  in execute_training()
84 			     config->imem_1d);  in execute_training()
92 	ret = load_phy_image(DMEM_START_ADDR, config->dmem_1d_size,  in execute_training()
93 			     config->dmem_1d);  in execute_training()
112 	if (config->memory_type == (uint8_t)LPDDR4) {  in execute_training()
115 	if (config->memory_type == (uint8_t)DDR3L) {  in execute_training()
124 	if ((config->imem_2d_size > 0U) && (config->dmem_2d_size > 0U)) {  in execute_training()
125 		ret = execute_2d_training(config);  in execute_training()
133 	ret = load_register_cfg_16(config->pie_size, config->pie);  in execute_training()
139 uint32_t ddr_init_cfg(const struct ddrss_config *config)  in ddr_init_cfg()  argument
144 	ret = ddrc_init_cfg(config);  in ddr_init_cfg()
156 	ret = execute_training(config);  in ddr_init_cfg()