Lines Matching refs:pdimm
33 const struct dimm_params *pdimm) in cal_csn_config() argument
41 const unsigned int ba_bits_cs_n = pdimm->bank_addr_bits; in cal_csn_config()
42 const unsigned int row_bits_cs_n = pdimm->n_row_addr - 12U; in cal_csn_config()
43 const unsigned int col_bits_cs_n = pdimm->n_col_addr - 8U; in cal_csn_config()
44 const unsigned int bg_bits_cs_n = pdimm->bank_group_bits; in cal_csn_config()
74 const struct dimm_params *pdimm) in avoid_odt_overlap() argument
92 const struct dimm_params *pdimm, in cal_timing_cfg() argument
120 const int pretoact_mclk = picos_to_mclk(clk, pdimm->trp_ps); in cal_timing_cfg()
121 const int acttopre_mclk = picos_to_mclk(clk, pdimm->tras_ps); in cal_timing_cfg()
122 const int acttorw_mclk = picos_to_mclk(clk, pdimm->trcd_ps); in cal_timing_cfg()
124 const int trfc1_min = pdimm->die_density >= 0x3 ? 16000 : in cal_timing_cfg()
125 (pdimm->die_density == 0x4 ? 26000 : in cal_timing_cfg()
126 (pdimm->die_density == 0x5 ? 35000 : in cal_timing_cfg()
129 pdimm->trfc1_ps) - 8; in cal_timing_cfg()
130 int wrrec_mclk = picos_to_mclk(clk, pdimm->twr_ps); in cal_timing_cfg()
132 pdimm->trrds_ps), in cal_timing_cfg()
152 pdimm->trp_ps) >> 4U; in cal_timing_cfg()
154 pdimm->tras_ps) >> 4U; in cal_timing_cfg()
156 pdimm->trcd_ps) >> 4U; in cal_timing_cfg()
160 pdimm->trfc1_ps) - 8U) >> 4U; in cal_timing_cfg()
161 const unsigned int ext_wrrec = (picos_to_mclk(clk, pdimm->twr_ps) + in cal_timing_cfg()
179 pdimm->trfc1_ps + 10000U)); in cal_timing_cfg()
189 const int tccdl = max(5U, picos_to_mclk(clk, pdimm->tccdl_ps)); in cal_timing_cfg()
196 const unsigned int acttoact_bg = picos_to_mclk(clk, pdimm->trrdl_ps); in cal_timing_cfg()
200 const unsigned int refrec_cid_mclk = pdimm->package_3ds ? in cal_timing_cfg()
201 picos_to_mclk(clk, pdimm->trfc_slr_ps) : 0; in cal_timing_cfg()
202 const unsigned int acttoact_cid_mclk = pdimm->package_3ds ? 4U : 0; in cal_timing_cfg()
206 if (avoid_odt_overlap(conf, pdimm) == 2) { in cal_timing_cfg()
249 if (pdimm->trfc1_ps < trfc1_min) { in cal_timing_cfg()
250 ERROR("trfc1_ps (%d) < %d\n", pdimm->trfc1_ps, trfc1_min); in cal_timing_cfg()
358 const struct dimm_params *pdimm) in cal_ddr_sdram_rcw() argument
363 if (pdimm->rdimm == 0) { in cal_ddr_sdram_rcw()
379 pdimm->rcw[0] << 28 | in cal_ddr_sdram_rcw()
380 pdimm->rcw[1] << 24 | in cal_ddr_sdram_rcw()
381 pdimm->rcw[2] << 20 | in cal_ddr_sdram_rcw()
382 pdimm->rcw[3] << 16 | in cal_ddr_sdram_rcw()
383 pdimm->rcw[4] << 12 | in cal_ddr_sdram_rcw()
384 pdimm->rcw[5] << 8 | in cal_ddr_sdram_rcw()
385 pdimm->rcw[6] << 4 | in cal_ddr_sdram_rcw()
386 pdimm->rcw[7]; in cal_ddr_sdram_rcw()
388 pdimm->rcw[8] << 28 | in cal_ddr_sdram_rcw()
389 pdimm->rcw[9] << 24 | in cal_ddr_sdram_rcw()
391 pdimm->rcw[11] << 16 | in cal_ddr_sdram_rcw()
392 pdimm->rcw[12] << 12 | in cal_ddr_sdram_rcw()
393 pdimm->rcw[13] << 8 | in cal_ddr_sdram_rcw()
394 pdimm->rcw[14] << 4 | in cal_ddr_sdram_rcw()
407 const struct dimm_params *pdimm, in cal_ddr_sdram_cfg() argument
413 const unsigned int rd_en = (pdimm->rdimm != 0U) ? 1U : 0U; in cal_ddr_sdram_cfg()
420 const unsigned int twot_en = pdimm->rdimm ? in cal_ddr_sdram_cfg()
437 const unsigned int num_pr = pdimm->package_3ds + 1U; in cal_ddr_sdram_cfg()
497 if (pdimm->package_3ds != 0) { in cal_ddr_sdram_cfg()
498 if (((pdimm->package_3ds + 1) & 0x1) != 0) { in cal_ddr_sdram_cfg()
501 regs->sdram_cfg[2] |= ((pdimm->package_3ds + 1) >> 1) in cal_ddr_sdram_cfg()
512 const struct dimm_params *pdimm) in cal_ddr_sdram_interval() argument
514 const unsigned int refint = picos_to_mclk(clk, pdimm->refresh_rate_ps); in cal_ddr_sdram_interval()
527 const struct dimm_params *pdimm, in cal_ddr_sdram_mode() argument
555 const unsigned int wr_mclk = picos_to_mclk(clk, pdimm->twr_ps); in cal_ddr_sdram_mode()
584 picos_to_mclk(clk, pdimm->tccdl_ps)); in cal_ddr_sdram_mode()
817 const struct dimm_params *pdimm) in cal_ddr_dq_mapping() argument
821 regs->dq_map[0] = ((pdimm->dq_mapping[0] & 0x3F) << 26) | in cal_ddr_dq_mapping()
822 ((pdimm->dq_mapping[1] & 0x3F) << 20) | in cal_ddr_dq_mapping()
823 ((pdimm->dq_mapping[2] & 0x3F) << 14) | in cal_ddr_dq_mapping()
824 ((pdimm->dq_mapping[3] & 0x3F) << 8) | in cal_ddr_dq_mapping()
825 ((pdimm->dq_mapping[4] & 0x3F) << 2); in cal_ddr_dq_mapping()
827 regs->dq_map[1] = ((pdimm->dq_mapping[5] & 0x3F) << 26) | in cal_ddr_dq_mapping()
828 ((pdimm->dq_mapping[6] & 0x3F) << 20) | in cal_ddr_dq_mapping()
829 ((pdimm->dq_mapping[7] & 0x3F) << 14) | in cal_ddr_dq_mapping()
830 ((pdimm->dq_mapping[10] & 0x3F) << 8) | in cal_ddr_dq_mapping()
831 ((pdimm->dq_mapping[11] & 0x3F) << 2); in cal_ddr_dq_mapping()
833 regs->dq_map[2] = ((pdimm->dq_mapping[12] & 0x3F) << 26) | in cal_ddr_dq_mapping()
834 ((pdimm->dq_mapping[13] & 0x3F) << 20) | in cal_ddr_dq_mapping()
835 ((pdimm->dq_mapping[14] & 0x3F) << 14) | in cal_ddr_dq_mapping()
836 ((pdimm->dq_mapping[15] & 0x3F) << 8) | in cal_ddr_dq_mapping()
837 ((pdimm->dq_mapping[16] & 0x3F) << 2); in cal_ddr_dq_mapping()
840 regs->dq_map[3] = ((pdimm->dq_mapping[17] & 0x3F) << 26) | in cal_ddr_dq_mapping()
841 ((pdimm->dq_mapping[8] & 0x3F) << 20) | in cal_ddr_dq_mapping()
843 (pdimm->dq_mapping[9] & 0x3F) << 14) | in cal_ddr_dq_mapping()
844 pdimm->dq_mapping_ors; in cal_ddr_dq_mapping()
888 const struct dimm_params *pdimm) in cal_ddr_csn_bnds() argument
905 cal_csn_config(i, regs, popts, pdimm); in cal_ddr_csn_bnds()
1326 const struct dimm_params *pdimm, in compute_ddrc() argument
1337 if (mclk_ps < pdimm->tckmin_x_ps) { in compute_ddrc()
1345 (pdimm->taa_ps + mclk_ps - 1) / mclk_ps; in compute_ddrc()
1348 caslat_skip = skip_caslat(pdimm->tckmin_x_ps, in compute_ddrc()
1349 pdimm->taa_ps, in compute_ddrc()
1351 pdimm->package_3ds); in compute_ddrc()
1356 while (((pdimm->caslat_x & ~caslat_skip & (1 << cas_latency)) == 0) && in compute_ddrc()
1374 cal_ddr_csn_bnds(regs, popts, conf, pdimm); in compute_ddrc()
1375 cal_ddr_sdram_cfg(clk, regs, popts, pdimm, ip_rev); in compute_ddrc()
1376 cal_ddr_sdram_rcw(clk, regs, popts, pdimm); in compute_ddrc()
1377 cal_timing_cfg(clk, regs, popts, pdimm, conf, cas_latency, in compute_ddrc()
1379 cal_ddr_dq_mapping(regs, pdimm); in compute_ddrc()
1385 cal_ddr_sdram_mode(clk, regs, popts, conf, pdimm, cas_latency, in compute_ddrc()
1389 cal_ddr_sdram_interval(clk, regs, popts, pdimm); in compute_ddrc()