41 int __init smmuv3_security_init(uintptr_t smmu_base)  in smmuv3_security_init()  argument
44 	if (smmuv3_poll(smmu_base + SMMU_GBPA, SMMU_GBPA_UPDATE, 0U) != 0U)  in smmuv3_security_init()
51 	mmio_setbits_32(smmu_base + SMMU_GBPA,  in smmuv3_security_init()
54 	if (smmuv3_poll(smmu_base + SMMU_GBPA, SMMU_GBPA_UPDATE, 0U) != 0U)  in smmuv3_security_init()
58 	if ((mmio_read_32(smmu_base + SMMU_S_IDR1) &  in smmuv3_security_init()
63 	if (smmuv3_poll(smmu_base + SMMU_S_GBPA, SMMU_S_GBPA_UPDATE, 0U) != 0U)  in smmuv3_security_init()
66 	mmio_setbits_32(smmu_base + SMMU_S_GBPA,  in smmuv3_security_init()
69 	return smmuv3_poll(smmu_base + SMMU_S_GBPA, SMMU_S_GBPA_UPDATE, 0U);  in smmuv3_security_init()
73 int __init smmuv3_init(uintptr_t smmu_base)  in smmuv3_init()  argument
90 	mmio_write_32(smmu_base + SMMU_S_INIT, SMMU_S_INIT_INV_ALL);  in smmuv3_init()
93 	if (smmuv3_poll(smmu_base + SMMU_S_INIT,  in smmuv3_init()
101 		if ((mmio_read_32(smmu_base + SMMU_ROOT_IDR0) &  in smmuv3_init()
115 			mmio_write_32(smmu_base + SMMU_ROOT_GPT_BASE_CFG,  in smmuv3_init()
123 			mmio_write_64(smmu_base + SMMU_ROOT_GPT_BASE,  in smmuv3_init()
133 			mmio_setbits_32(smmu_base + SMMU_ROOT_CR0,  in smmuv3_init()
137 			if (smmuv3_poll(smmu_base + SMMU_ROOT_CR0ACK,  in smmuv3_init()
147 			mmio_setbits_32(smmu_base + SMMU_ROOT_CR0,  in smmuv3_init()
152 			if (smmuv3_poll(smmu_base + SMMU_ROOT_CR0ACK,  in smmuv3_init()
171 int smmuv3_ns_set_abort_all(uintptr_t smmu_base)  in smmuv3_ns_set_abort_all()  argument
174 	if (smmuv3_poll(smmu_base + SMMU_GBPA, SMMU_GBPA_UPDATE, 0U) != 0U) {  in smmuv3_ns_set_abort_all()
182 	mmio_setbits_32(smmu_base + SMMU_GBPA, SMMU_GBPA_UPDATE | SMMU_GBPA_ABORT);  in smmuv3_ns_set_abort_all()
183 	if (smmuv3_poll(smmu_base + SMMU_GBPA, SMMU_GBPA_UPDATE, 0U) != 0U) {  in smmuv3_ns_set_abort_all()
188 	mmio_clrbits_32(smmu_base + SMMU_CR0, SMMU_CR0_SMMUEN);  in smmuv3_ns_set_abort_all()
189 	if (smmuv3_poll(smmu_base + SMMU_CR0ACK, SMMU_CR0_SMMUEN, 0U) != 0U) {  in smmuv3_ns_set_abort_all()