134 	 const uint32_t channel, uint32_t flags)  in mhu_v3_x_doorbell_clear()  argument
156 	mdbcw_reg[channel].mdbcw_clr |= flags;  in mhu_v3_x_doorbell_clear()
162 	 const uint32_t channel, uint32_t flags)  in mhu_v3_x_doorbell_write()  argument
185 	pdbcw_reg[channel].pdbcw_set |= flags;  in mhu_v3_x_doorbell_write()
191 	 const uint32_t channel, uint32_t *flags)  in mhu_v3_x_doorbell_read()  argument
215 		*flags = pdbcw_reg[channel].pdbcw_st;  in mhu_v3_x_doorbell_read()
221 		*flags = mdbcw_reg[channel].mdbcw_st;  in mhu_v3_x_doorbell_read()
231 	 const struct mhu_v3_x_dev_t *dev, const uint32_t channel,  in mhu_v3_x_doorbell_mask_set()  argument
255 	mdbcw_reg[channel].mdbcw_msk_set |= flags;  in mhu_v3_x_doorbell_mask_set()
261 	 const struct mhu_v3_x_dev_t *dev, const uint32_t channel,  in mhu_v3_x_doorbell_mask_clear()  argument
285 	mdbcw_reg[channel].mdbcw_msk_clr = flags;  in mhu_v3_x_doorbell_mask_clear()
291 	 const struct mhu_v3_x_dev_t *dev, const uint32_t channel,  in mhu_v3_x_doorbell_mask_get()  argument
319 	*flags = mdbcw_reg[channel].mdbcw_msk_st;  in mhu_v3_x_doorbell_mask_get()
325 	 const struct mhu_v3_x_dev_t *dev, const uint32_t channel,  in mhu_v3_x_channel_interrupt_enable()  argument
355 		pdbcw_reg[channel].pdbcw_int_en = MHU_V3_X_PDBCW_INT_X_TFR_ACK;  in mhu_v3_x_channel_interrupt_enable()
361 		pdbcw_reg[channel].pdbcw_ctrl = MHU_V3_X_PDBCW_CTRL_PBX_COMB_EN;  in mhu_v3_x_channel_interrupt_enable()
370 		mdbcw_reg[channel].mdbcw_ctrl = MHU_V3_X_MDBCW_CTRL_MBX_COMB_EN;  in mhu_v3_x_channel_interrupt_enable()
380 	 const struct mhu_v3_x_dev_t *dev, const uint32_t channel,  in mhu_v3_x_channel_interrupt_disable()  argument
407 		pdbcw_reg[channel].pdbcw_int_clr = MHU_V3_X_PDBCW_INT_X_TFR_ACK;  in mhu_v3_x_channel_interrupt_disable()
410 		pdbcw_reg[channel].pdbcw_int_en &=  in mhu_v3_x_channel_interrupt_disable()
417 		pdbcw_reg[channel].pdbcw_ctrl &=  in mhu_v3_x_channel_interrupt_disable()
427 		mdbcw_reg[channel].mdbcw_ctrl &=  in mhu_v3_x_channel_interrupt_disable()
438 	 const struct mhu_v3_x_dev_t *dev, const uint32_t channel,  in mhu_v3_x_channel_interrupt_clear()  argument
472 	pdbcw_reg[channel].pdbcw_int_clr |= 0x1;  in mhu_v3_x_channel_interrupt_clear()