Lines Matching refs:REG

29 #define	BIT_NUM(REG, id)	\  argument
30 ((id) & ((1U << REG##R_SHIFT) - 1U))
38 #define GICD_OFFSET_8(REG, id) \ argument
40 GICD_##REG##R + (uintptr_t)(id) : \
41 GICD_##REG##RE + (uintptr_t)(id) - MIN_ESPI_ID)
43 #define GICD_OFFSET(REG, id) \ argument
45 GICD_##REG##R + (((uintptr_t)(id) >> REG##R_SHIFT) << 2) : \
46 GICD_##REG##RE + ((((uintptr_t)(id) - MIN_ESPI_ID) >> \
47 REG##R_SHIFT) << 2))
49 #define GICD_OFFSET_64(REG, id) \ argument
51 GICD_##REG##R + (((uintptr_t)(id) >> REG##R_SHIFT) << 3) : \
52 GICD_##REG##RE + ((((uintptr_t)(id) - MIN_ESPI_ID) >> \
53 REG##R_SHIFT) << 3))
56 #define GICD_OFFSET_8(REG, id) \ argument
57 (GICD_##REG##R + (uintptr_t)(id))
59 #define GICD_OFFSET(REG, id) \ argument
60 (GICD_##REG##R + (((uintptr_t)(id) >> REG##R_SHIFT) << 2))
62 #define GICD_OFFSET_64(REG, id) \ argument
63 (GICD_##REG##R + (((uintptr_t)(id) >> REG##R_SHIFT) << 3))
70 #define GICD_READ(REG, base, id) \ argument
71 mmio_read_32((base) + GICD_OFFSET(REG, (id)))
73 #define GICD_READ_64(REG, base, id) \ argument
74 mmio_read_64((base) + GICD_OFFSET_64(REG, (id)))
76 #define GICD_WRITE_8(REG, base, id, val) \ argument
77 mmio_write_8((base) + GICD_OFFSET_8(REG, (id)), (val))
79 #define GICD_WRITE(REG, base, id, val) \ argument
80 mmio_write_32((base) + GICD_OFFSET(REG, (id)), (val))
82 #define GICD_WRITE_64(REG, base, id, val) \ argument
83 mmio_write_64((base) + GICD_OFFSET_64(REG, (id)), (val))
90 #define GICD_GET_BIT(REG, base, id) \ argument
91 ((mmio_read_32((base) + GICD_OFFSET(REG, (id))) >> \
92 BIT_NUM(REG, (id))) & 1U)
95 #define GICD_SET_BIT(REG, base, id) \ argument
96 mmio_setbits_32((base) + GICD_OFFSET(REG, (id)), \
97 ((uint32_t)1 << BIT_NUM(REG, (id))))
100 #define GICD_CLR_BIT(REG, base, id) \ argument
101 mmio_clrbits_32((base) + GICD_OFFSET(REG, (id)), \
102 ((uint32_t)1 << BIT_NUM(REG, (id))))
105 #define GICD_WRITE_BIT(REG, base, id) \ argument
106 mmio_write_32((base) + GICD_OFFSET(REG, (id)), \
107 ((uint32_t)1 << BIT_NUM(REG, (id))))
115 #define GICR_OFFSET_8(REG, id) \ argument
117 GICR_##REG##R + (uintptr_t)(id) : \
118 GICR_##REG##R + (uintptr_t)(id) - (MIN_EPPI_ID - MIN_SPI_ID))
120 #define GICR_OFFSET(REG, id) \ argument
122 GICR_##REG##R + (((uintptr_t)(id) >> REG##R_SHIFT) << 2) : \
123 GICR_##REG##R + ((((uintptr_t)(id) - (MIN_EPPI_ID - MIN_SPI_ID))\
124 >> REG##R_SHIFT) << 2))
126 #define GICR_OFFSET_8(REG, id) \ argument
127 (GICR_##REG##R + (uintptr_t)(id))
129 #define GICR_OFFSET(REG, id) \ argument
130 (GICR_##REG##R + (((uintptr_t)(id) >> REG##R_SHIFT) << 2))
134 #define GICR_READ(REG, base, id) \ argument
135 mmio_read_32((base) + GICR_OFFSET(REG, (id)))
137 #define GICR_WRITE_8(REG, base, id, val) \ argument
138 mmio_write_8((base) + GICR_OFFSET_8(REG, (id)), (val))
140 #define GICR_WRITE(REG, base, id, val) \ argument
141 mmio_write_32((base) + GICR_OFFSET(REG, (id)), (val))
148 #define GICR_GET_BIT(REG, base, id) \ argument
149 ((mmio_read_32((base) + GICR_OFFSET(REG, (id))) >> \
150 BIT_NUM(REG, (id))) & 1U)
153 #define GICR_WRITE_BIT(REG, base, id) \ argument
154 mmio_write_32((base) + GICR_OFFSET(REG, (id)), \
155 ((uint32_t)1 << BIT_NUM(REG, (id))))
158 #define GICR_SET_BIT(REG, base, id) \ argument
159 mmio_setbits_32((base) + GICR_OFFSET(REG, (id)), \
160 ((uint32_t)1 << BIT_NUM(REG, (id))))
163 #define GICR_CLR_BIT(REG, base, id) \ argument
164 mmio_clrbits_32((base) + GICR_OFFSET(REG, (id)), \
165 ((uint32_t)1 << BIT_NUM(REG, (id))))