plat/arm/arm-build-options.rst

7 -  ``ARM_BL31_IN_DRAM``: Boolean option to select loading of BL31 in TZC secured
8    DRAM. By default, BL31 is in the secure SRAM. Set this flag to 1 to load
9    BL31 in TZC secured DRAM. If TSP is present, then setting this option also
26    By default, Arm platforms use a watchdog to trigger a system reset in case
28    could not be loaded or authenticated). The watchdog is enabled in the early
29    platform setup hook at BL1 and disabled in the BL1 prepare exit hook. The
45    is set, the functions which deal with MPIDR assume that the ``MT`` bit in
46    MPIDR is set and access the bit-fields in MPIDR accordingly. Default value of
49 - ``ARM_PLAT_PROVIDES_BL2_MEM_PARAMS``: This flag can be overriden to 1 in the Arm
52    in ``plat/arm/common/`` is omitted, and the platform must add its own
56    for the construction of composite state-ID in the power-state parameter.
60    in which case the platform is configured to expect NULL in the State-ID
71    -  ``regs`` : return the ROTPK hash stored in the Trusted root-key storage
73    -  ``devel_rsa`` : return a development public key hash embedded in the BL1
78       ``ROT_KEY``, there are 3k and 4k RSA keys in ``plat/arm/board/common/rotpk/``.
79    -  ``devel_ecdsa`` : return a development public key hash embedded in the BL1
82       is specified with ``ROT_KEY``, such as the 384 bit key in the same directory.
85    -  ``devel_full_dev_rsa_key`` : return a development public key embedded in
88       be changed by setting ``ROT_KEY``, there are 3k and 4k RSA keys in
90    - ``devel_full_dev_ecdsa_key`` : return a development public key embedded in
93       ECDSA key is specified by ``ROT_KEY``, such as the 384 bit key in the same directory.
99    -  ``dram`` : Secure region in DRAM (default option when TBB is enabled,
107    the various partitions present in the GPT image. This support is available
112    |FIP in a GPT image|
115 map is explained in the :ref:`Firmware Design`.
126    then TF-A will detect if an earlier version is in use. Default is 1.
140    complete a warm reboot sequence in which only the CPUs are power cycled.
145 - ``FVP_TRUSTED_SRAM_SIZE``: Size (in kilobytes) of the Trusted SRAM region to
153    runtime software in AArch32 mode, which is required to run AArch32 on Juno.
154    By default this flag is set to '0'. Enabling this flag builds BL1 and BL2 in
167   particular Neoverse RD platform may have multiple variants which may differ in
174 .. |FIP in a GPT image| image:: ../../resources/diagrams/FIP_in_a_GPT_image.png