Lines Matching refs:the

5 operations in the Trusted Firmware-A Power State Coordination Interface (PSCI)
6 implementation, using the in-built Performance Measurement Framework (PMF) and
12 The tests are based on the ``runtime-instrumentation`` test suite provided by
13 the Trusted Firmware Test Framework (TFTF). The release build of this framework
14 was used because the results in the debug build became skewed; the console
15 output prevented some of the tests from executing in parallel.
20 - **Parallel Tests** This type of test powers on all the non-lead CPUs and
21   brings them and the lead CPU to a common synchronization point.  The lead CPU
22   then initiates the test on all CPUs in parallel.
25   sequence. The lead CPU initiates the test on a non-lead CPU then waits for the
26   test to complete before proceeding to the next non-lead CPU. The lead CPU then
27   executes the test on itself.
29 Note there is very little variance observed in the values given (~1us), although
30 the values for each CPU are sometimes interchanged, depending on the order in
32 executing the tests sequentially in a single boot or rebooting between tests.
35 (unquantified) overhead on the results. PMF uses the generic counter for
44         Time taken from entering the TF PSCI implementation to the point the hardware
45         enters the low power state (WFI). Referring to the TF runtime instrumentation points, this
49         Time taken from the point the hardware exits the low power state to exiting
50         the TF PSCI implementation. This corresponds to: ``(RT_INSTR_EXIT_PSCI -
54         Time taken to flush the caches during powerdown. This corresponds to: