docs/perf/psci-performance-juno.rst

5 operations in the Trusted Firmware-A Power State Coordination Interface (PSCI)
6 implementation, using the in-built Performance Measurement Framework (PMF) and
41 configuration in CI.
49 .. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in
68 .. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in
87 .. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in
106 .. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in
128 .. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in
147 .. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in
166 .. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in serial (v2.14)
185 .. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in serial (v2.13)
206 ``CPU_OFF`` on all non-lead CPUs in sequence then, ``CPU_SUSPEND`` on the lead
245 ``CPU_VERSION`` in parallel
248 .. table:: ``CPU_VERSION`` latency (µs) in parallel on all cores (2.14)
266 .. table:: ``CPU_VERSION`` latency (µs) in parallel on all cores (2.13)
288 TF-A was built using the same build instructions as detailed in the procedure
291 In the results below, CPUs 0-3 refer to CPUs in the little cluster (A53) and
292 CPUs 4-5 refer to CPUs in the big cluster (A57). In all cases CPU 4 is the lead
298 ``CPU_SUSPEND`` to deepest power level on all CPUs in parallel
317 A large variance in ``PSCI_ENTRY`` and ``PSCI_EXIT`` times across CPUs is
319 for the 3 other CPUs in the cluster (0-2) to complete ``PSCI_ENTRY`` and release
323 last CPUs in their respective clusters to power down, therefore both the L1 and
330 ``CPU_SUSPEND`` to power level 0 on all CPUs in parallel
349 There is no lock contention in TF generic code at power level 0 but the large
350 variance in ``PSCI_ENTRY`` times across CPUs is due to lock contention in Juno
365 ``CPU_SUSPEND`` to deepest power level on all CPUs in sequence
384 The ``CFLUSH_OVERHEAD`` times for lead CPU 4 and all CPUs in the non-lead cluster
385 are large because all other CPUs in the cluster are powered down during the
397 ``CPU_SUSPEND`` to power level 0 on all CPUs in sequence
420 The ``PSCI_ENTRY`` times for CPUs in the big cluster are slightly smaller than
421 for the CPUs in little cluster due to greater CPU performance.
423 The ``PSCI_EXIT`` times are generally lower than in the last test because the
427 ``CPU_OFF`` on all non-lead CPUs in sequence then ``CPU_SUSPEND`` on lead CPU to deepest power level
432 1. Call ``CPU_ON`` and ``CPU_OFF`` on each non-lead CPU in sequence.
455 CPUs in that cluster are powerered down during the test. The ``CPU_OFF`` call
466 The ``PSCI_EXIT`` times for CPUs in the big cluster are slightly smaller than
467 for CPUs in the little cluster due to greater CPU performance.  These times
468 generally are greater than the ``PSCI_EXIT`` times in the ``CPU_SUSPEND`` tests
469 because there is more code to execute in the "on finisher" compared to the
472 ``PSCI_VERSION`` on all CPUs in parallel
476 approximates the round trip latency for handling a fast SMC at EL3 in TF.