docs/design/psci-pd-tree.rst

9    populate a tree that describes the hierarchy of power domains in the
19    code is not scalable. The use of an MPIDR also restricts the number of
22    Therefore, there is a need to decouple allocation of MPIDRs from the
25 #. The current arrangement of the power domain tree requires a binary search
36 #. The attributes of a core power domain differ from the attributes of power
55 removed. A platform must define an array of unsigned chars such that:
57 #. The first entry in the array specifies the number of power domains at the
63    of power domains that are its direct children.
65 #. The size of the array minus the first entry will be equal to the number of
68 #. The value in each entry in the array is used to find the number of entries
69    to consider at the next level. The sum of the values (number of children) of
70    all the entries at a level specifies the number of entries in the array for
131 which is not allocated or corresponds to an absent core. The semantics of this
137 the index since there is no need to validate the MPIDR of the calling core.
144 (requirement 4.) during ``psci_setup()`` in such an order that the index of the
150 For platforms where the number of allocated MPIDRs is equal to the number of
155 It is possible that on some platforms, the allocation of MPIDRs is not
157 MPIDRs have been sparsely allocated, that is, the size of the range of MPIDRs
158 used by the platform is not equal to the number of core power domains.
160 The platform could adopt one of the following approaches to deal with this
170    in the power domain descriptor, that is, the number of core nodes described
171    is equal to the size of the range of MPIDRs allocated. This approach will
173    allow use of a simpler logic to convert an MPIDR to a core index.
185      * is used to track the state of all the nodes i.e. power domain instances
186      * described by the platform. The tree consists of nodes that describe CPU power
187      * domains i.e. leaf nodes and all other power domains which are parents of a
192          * Index of the first CPU power domain node level 0 which has this node
198          * Number of CPU power domains which are siblings of the domain indexed
204         /* Index of the parent power domain node */
213         /* Index of the parent power domain node */
219 The power domain tree is implemented as a combination of the following data
242 will be populated as follows. The value in each entry is the index of the parent
276 each entry is the index of the parent node.