docs/design/firmware-design.rst

499 BL31 initializes the per-CPU data framework, which provides a cache of
500 frequently accessed per-CPU data optimised for fast, concurrent manipulation
501 on different CPUs. This buffer includes pointers to per-CPU contexts, crash
928 uses per-CPU data this must either be initialized for all CPUs during this call,
955 Function ID is passed in W0 from the lower exception level (as per the
973 and the state of the SVE hint bit per the SMCCCv1.3. The framework finally sets
1239 A dedicated per-CPU crash stack is maintained by BL31 and this is retrieved via
1240 the per-CPU pointer cache. The implementation attempts to minimise the memory
1504 entry is stored in per-CPU data by ``cpu_data_init_cpu_ops()`` so that it can be quickly
1512 retrieves ``cpu_ops`` pointer member of per-CPU data, and from that, further
2302 It is a characteristic of Lamport's Bakery algorithm that the volatile per-CPU
2305 Depending upon the data cache line size, the per-CPU fields of the
2307 These per-CPU fields can be read and written during lock contention by multiple
2314 CPU0 updates its per-CPU field with data cache enabled. This write updates a
2316 CPU1 updates its per-CPU field of the ``bakery_lock_t`` structure with data cache
2346 The ``bakery_info_t`` represents a single per-CPU field of one lock and
2355     | `bakery_info_t`| <-- Lock_0 per-CPU field
2358     | `bakery_info_t`| <-- Lock_1 per-CPU field
2363     | `bakery_info_t`| <-- Lock_N per-CPU field
2371     | `bakery_info_t`| <-- Lock_0 per-CPU field
2374     | `bakery_info_t`| <-- Lock_1 per-CPU field
2379     | `bakery_info_t`| <-- Lock_N per-CPU field
2679 PMF timestamps are stored in a per-service timestamp region. On a
2681 in a per-CPU cache line aligned memory region.