docs/design/cpu-specific-build-macros.rst

1 Arm CPU Specific Build Macros
4 This document describes the various build options present in the CPU specific
6 for a specific CPU on a platform.
29    platform contains at least 1 CPU that requires dynamic mitigation.
34    least 1 CPU that requires this mitigation. Defaults to 1.
39    at least 1 CPU that requires this mitigation. Defaults to 1.
43    least 1 CPU that requires this mitigation. Defaults to 1.
47 CPU Errata Workarounds
51 are applied to each CPU by the reset handler. The errata details can be found
52 in the CPU specific errata documents published by Arm:
60 is for example ``A57`` for the ``Cortex_A57`` CPU.
68 these workarounds are enabled for the wrong CPU revision then the errata
82    CPU. This needs to be enabled for all revisions of the CPU.
87    CPU. This needs to be enabled only for revision >= r3p0 of the CPU.
90    CPU. This needs to be enabled only for revision >= r3p0 of the CPU.
95    CPU. This needs to be enabled only for revision <= r1p2 of the CPU.
98    CPU. This needs to be enabled only for revision <= r1p2 of the CPU.
114    CPU. This needs to be enabled only for revision <= r0p2 of the CPU.
120    link time to Cortex-A53 CPU. This needs to be enabled for some variants of
125    CPU. This needs to be enabled only for revision <= r0p3 of the CPU. From
130    to Cortex-A53 CPU.  This needs to be enabled for some variants of revision
135    CPUs. Though the erratum is present in every revision of the CPU,
138    Earlier revisions of the CPU have other errata which require the same
142    revisions of Cortex-A53 CPU.
147    CPU. This needs to be enabled only for revision r0p0 of the CPU.
150    CPU. This needs to be enabled only for revision r0p0 of the CPU.
153    CPU. This needs to be enabled only for revision r0p0 of the CPU.
156    CPU. This needs to be enabled only for revision <= r0p1 of the CPU.
159    CPU. This needs to be enabled only for revision <= r0p1 of the CPU.
162    CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
165    revisions of Cortex-A55 CPU.
170    CPU. This needs to be enabled only for revision r0p0 of the CPU.
173    CPU. This needs to be enabled only for revision r0p0 of the CPU.
176    CPU. This needs to be enabled only for revision r0p0 of the CPU.
179    CPU. This needs to be enabled only for revision r0p0 of the CPU.
182    CPU. This needs to be enabled only for revision <= r0p1 of the CPU.
185    CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
188    CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
191    CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
194    CPU. This needs to be enabled only for revision <= r1p2 of the CPU.
197    CPU. This needs to be enabled only for revision <= r1p2 of the CPU.
200    CPU. This needs to be enabled only for revision <= r1p3 of the CPU.
203    revisions of Cortex-A57 CPU.
208    CPU. This needs to be enabled only for revision r0p0 of the CPU, and is fixed
212    CPU. This needs to be enabled only for revision r0p0 and r1p0 of the CPU and
216    r1p1, r1p2 revisions of the CPU and is still open.
221    CPU. This needs to be enabled only for revision <= r0p3 of the CPU.
224    revisions of Cortex-A72 CPU.
229    CPU. This needs to be enabled only for revision r0p0 of the CPU.
232    CPU. This needs to be enabled only for revision <= r0p1 of the CPU.
237    CPU. This needs to be enabled only for revision r0p0 of the CPU.
240     CPU. This needs to be enabled only for revision r0p0 of the CPU.
245    CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
248    CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
251    CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
254    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
257    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
260    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
263    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
266    CPU. This needs to be enabled only for revision <= r4p0 of the CPU.
269    revisions of Cortex-A76 CPU. This errata is fixed in r3p0 but due to
271    of Cortex-A76 CPU.
274    CPU. This needs to be enabled only for revision <= r4p0 of the CPU.
277    CPU. This needs to be enabled only for revisions r3p0 - r4p1 of the CPU.
280    CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is
286    CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is
290    CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is
294    CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is
298    CPU. This needs to be enabled for all revisions <= r1p1 of the CPU and is
304    CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
307    CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
310    CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
313    CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open.
316    CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open.
319     CPU. This needs to be enabled for revisions <= r1p1 of the CPU.
322     CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open.
327    CPU. This needs to be enabled only for revision r0p0 - r1p0 of the CPU.
330    CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 of the CPU.
333    CPU. This needs to be enabled for revisions r1p0 and r1p1, r0p0 has the same
337    CPU. This needs to be enabled for revisions r0p0 and r1p0.
340    CPU. This needs to be enabled for revision r0p0, it is fixed in r1p0.
343    CPU. This needs to be enabled for revisions r1p0, r1p1, and r1p2. The issue
347    CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and
351    CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and
355    CPU, this erratum affects system configurations that do not use an ARM
360    CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 and
364    CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and
368    CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 and
374    Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1.
378   Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. This
382   Cortex-A78AE CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2.
386   Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. This
390   Cortex-A78AE CPU. This erratum affects system configurations that do not use
397   Cortex-A78C CPU. This needs to be enabled for revision r0p0. The erratum is
401   Cortex-A78C CPU. This needs to be enabled for revision r0p0. The erratum is
405   Cortex-A78C CPU. This needs to be enabled for revisions r0p1, r0p2 and
409   Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This
413   Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This
417   Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This
421   Cortex-A78C CPU, this erratum affects system configurations that do not use
426   Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2.
430   Cortex-A78C CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2.
434   Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2.
437 For Cortex-X1 CPU, the following errata build flags are defined:
440    CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
443    CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
446    CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
451    CPU. This needs to be enabled only for revision r0p0 and r1p0 of the CPU.
454    CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
457    CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
460    CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
463    CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
466    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
469    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
472    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
475    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
478    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
481    CPU. This needs to be enabled only for revisions r3p0 - r4p0 of the CPU.
484    CPU. This needs to be enabled only for revision <= r4p0 of the CPU.
487    CPU. This needs to be enabled for revisions r3p0, r3p1, r4p0, and r4p1, for
491    CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is
495    CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is
501    CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
505    CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed
509    CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed
513    CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed
517    CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open.
520    CPU. This needs to be enabled only for revision r1p0 and r1p1 of the
521    CPU.
524    CPU. This needs to be enabled for revisions r1p0 and r1p1 of the CPU, the
529    CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 of the
530    CPU.  It is still open.
533    CPU. This needs to be enabled for revisions r1p0 and r1p1 of the CPU, the
538    CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 and r1p2 of
539    the CPU.
542    CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 of the CPU.
546    CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 of the CPU.
550    CPU, this erratum affects system configurations that do not use an ARM
555    CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 of the
556    CPU. It is still open.
559    CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2 of the
560    CPU. It is still open.
563    CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, r1p2 of the
564    CPU. It is still open.
569    CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
573    CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
577    CPU, this affects system configurations that do not use and ARM interconnect
582    CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
586    CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
590    CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
594    CPU, this affects all configurations. This needs to be enabled for revisions
598    CPU. This needs to be enabled for revision r0p0 - r0p2 and is still open.
601    CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 and is
605    CPU. This needs to be enabled only for revisions r0p0 and r0p1 of
606    the CPU. It is fixed in r0p2.
611   CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1.
614   CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 of the CPU and
620    Cortex-A710 CPU. This needs to be enabled only for revision r1p0. It has
624    Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0.
628    Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0.
632    Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0.
636    Cortex-A710 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
637    r2p0 of the CPU. It is still open.
640    Cortex-A710 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
641    r2p0 of the CPU. It is still open.
644    Cortex-A710 CPU. This needs to be enabled for revisions r1p0, r2p0 of the CPU
648    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
649    of the CPU and is still open.
652    Cortex-A710 CPU. This needs to be enabled for revision r2p0 of the CPU and
656    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
657    of the CPU and is fixed in r2p1.
660    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
661    of the CPU and is fixed in r2p1.
664    Cortex-A710 CPU. This needs to be enabled for revision r2p0 of the CPU
668    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
669    of the CPU and is fixed in r2p1.
672    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and
673    r2p1 of the CPU and is still open.
676    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
677    of the CPU and is fixed in r2p1.
680    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
681    of the CPU and is fixed in r2p1.
684    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
685    of the CPU and is fixed in r2p1.
688    CPU, and applies to system configurations that do not use and ARM
693    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and
694    r2p1 of the CPU and is still open.
697    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and
698    r2p1 of the CPU and is still open.
701    CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
702    CPU and is still open.
705    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and
706    r2p1 of the CPU and is still open.
709   CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r2p1 of the
710   CPU and is still open.
715    CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
718    CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
721    CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
724    CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
727    CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
730    CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
733    CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
736    CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
739    CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
742    CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
745    CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
749    CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
753    CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU,
757    CPU. This needs to be enabled for revision r0p0, r0p1, r0p2, r0p3 and is still open.
760    CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
764    CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed
768    CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed
772    CPU, this erratum affects system configurations that do not use and ARM
777    CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed
781    CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is
785    CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is
791    CPU. This needs to be enabled for revisions r0p0 and r0p1 and is still open.
794    CPU. This needs to be enabled for revisions r0p0 and is still open.
799    CPU. This needs to be enabled only for r1p0, it is fixed in r2p0.
802    CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it
806    CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it
810    CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it
814    CPU. This needs to be enabled only for revision r1p0 of the CPU, it is fixed
818    CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
819    CPU, it is fixed in r2p1.
822    CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
823    CPU, it is fixed in r2p1.
826    CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
827    CPU, it is fixed in r2p1.
830    CPU. This needs to be enabled only for revision r2p0 of the CPU, it is fixed
834    CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
835    CPU, it is fixed in r2p1.
838    CPU. This needs to be enabled only for revision r2p0 of the CPU, it is fixed
842    CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
843    CPU, it is fixed in r2p1.
846    CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
847    CPU, it is fixed in r2p1.
850    CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
851    CPU and is still open.
854    CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
855    CPU, it is fixed in r2p1.
858    CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
859    CPU, it is fixed in r2p1.
862    CPU and affects system configurations that do not use an Arm interconnect IP.
867    CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
868    CPU and is still open.
871    CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
872    CPU and is still open.
875    CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
876    CPU and is still open.
879    CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
880    CPU and is still open.
883    CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
884    CPU and is still open.
889   CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it
893   CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1, it is
897   Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0
898   of the CPU, it is fixed in r1p1.
901   Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0
902   of the CPU, it is fixed in r1p1.
905   CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the
906   CPU, it is fixed in r1p2.
909   CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU.
913   CPU and affects system configurations that do not use an ARM interconnect
918   Cortex-X3 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
922   CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1. It is
926   CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the
927   CPU. It is fixed in r1p2.
930   CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2
931   of the CPU. It is still open.
934   CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2
935   of the CPU. It is still open.
938   CPU. This needs to be enabled only for revisions r0p0, r1p0, r1p1 and r1p2
939   of the CPU and it is still open.
942   CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of
943   the CPU. It is fixed in r1p2.
948   CPU and affects system configurations that do not use an Arm interconnect IP.
956   CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
960    CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed
964   CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2.
967   CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2.
970   CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2.
973   CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2.
976   CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2.
979   CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2.
982   CPU. This needs to be enabled for revision r0p2. It is fixed in r0p3.
985   CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 and r0p3.
989   CPU. This needs to be enabled for revision r0p0, r0p1, r0p2 and r0p3.
995   CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1.
998   CPU. This needs to be enabled for revisions r0p0 and r0p1. It is still open.
1003    Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2,
1007    Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1,
1011    Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1 and
1015    Cortex-A510 CPU. This needs to be enabled only for revision r0p2 and is fixed
1020    Cortex-A510 CPU. This needs to be enabled only for revision r0p2 and is
1025    Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1,
1029    Cortex-A510 CPU. This needs to be enabled only for revision r1p0 and is fixed
1033    Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2,
1038    Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2,
1042    Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2,
1046    Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2,
1050    Cortex-A510 CPU. This needs to applied for revisions r0p0, r0p1, r0p2,
1054    Cortex-A510 CPU. This needs to applied for revisions r1p0 and r1p1, and is
1058    Cortex-A510 CPU. This needs to applied for revisions r0p0, r0p1, r0p2,
1062    Cortex-A510 CPU. This needs to be applied to revision r0p0, r0p1, r0p2,
1066    Cortex-A510 CPU. This needs to be applied to revisions r0p1, r0p2, r0p3,
1070    Cortex-A510 CPU. This needs to be applied to revisions r0p1, r0p2, r0p3,
1074    Cortex-A510 CPU. This needs to be applied to revisions r0p1, r0p2, r0p3,
1080    Cortex-A520 CPU. This needs to applied for revisions r0p0, r0p1 of the
1081    CPU and is still open.
1084    Cortex-A520 CPU. This needs to be enabled for revisions r0p0 and r0p1.
1088    Cortex-A520 CPU. This needs to be enabled for revisions r0p0 and r0p1.
1094    Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0.
1098    Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. It is
1102    Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. It is
1106    Cortex-A715 CPU. This needs to be enabled only for revision r1p0.
1112    Cortex-A715 CPU. This needs to be enabled only for revision r1p0 and
1117    Cortex-A715 CPU. This needs to be enabled only for revision r1p0.
1121    Cortex-A715 CPU. This needs to be enabled for revision r1p0. There is no
1125    Cortex-A715 CPU. This needs to be enabled only for revision r1p0.
1129    Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0
1133    Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0,
1137    Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0,
1141    Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0,
1145    Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0,
1151    Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1.
1155    Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1.
1159    Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1.
1163    Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1.
1167    Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1.
1171    Cortex-A720 CPU. This needs to be enabled for revisions r0p0, r0p1
1175    Cortex-A720 CPU. This needs to be enabled for revisions r0p0, r0p1
1179    Cortex-A720 CPU. This needs to be enabled for revisions r0p0, r0p1
1185    Cortex-A720_AE CPU. This needs to be enabled for revisions r0p0 and r0p1. It
1189    to Cortex-A720_AE CPU. This needs to be enabled for revisions r0p0.
1195    Cortex-A725 CPU. This needs to be enabled for revisions r0p0 when
1199    Cortex-A725 CPU. This needs to be enabled for revisions r0p0.
1203    Cortex-A725 CPU. This needs to be enabled for revisions r0p0, r0p1
1207    Cortex-A725 CPU. This needs to be enabled for revisions r0p0 and r0p1.
1211    Cortex-A725 CPU. This needs to be enabled for revisions r0p0 and r0p1.
1217    C1-Ultra CPU. This needs to be enabled for revision r0p0 and is fixed
1221    C1-Ultra CPU. This needs to be enabled for revision r0p0 and is
1225    C1-Ultra CPU. This needs to be enabled for revision r0p0 and is
1229    C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and
1233    C1-Ultra CPU. This needs to be enabled for revision r0p0 and is
1237    C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and
1241    C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and
1245    C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and
1249    C1-Ultra CPU. This needs to be enabled for revision r1p0 and is still
1253    C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and
1259    C1-Premium CPU. This needs to be enabled for revision r0p0, and is
1263    C1-Premium CPU. This needs to be enabled for revision r0p0, and is fixed
1267    C1-Premium CPU. This needs to be enabled for revision r0p0, and is fixed
1271    C1-Premium CPU. This needs to be enabled for revision r0p0, and is fixed
1275    C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and
1279    C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and
1283    C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and
1287    C1-Premium CPU. This needs to be enabled for revision r1p0 and is
1291    C1-Premium CPU. This needs to be enabled for revisions r0p0, r1p0 and
1297    CPU. This needs to be enabled only for revision r0p0 and is fixed in r1p0.
1300    CPU. This needs to be enabled only for revision r0p0 and is fixed in r1p0.
1303    CPU. This needs to be enabled only for revision r0p0 and is fixed in r1p0.
1306    CPU. This needs to be enabled for revisions r0p0, r1p0 and is fixed in
1310    CPU. This needs to be enabled for revisions r0p0 and r1p0 of the CPU, it
1314    CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 and is
1318    CPU. This needs to be enabled for revisions r0p0 and r1p0 of the CPU, it
1322    CPU. This needs to be enabled for revisions r0p0 and r1p0 of the CPU, it
1328 Similar to CPU errata, TF-A also implements workarounds for DSU (DynamIQ
1337 of DSU errata workarounds are similar to `CPU errata workarounds`_.
1364 CPU Specific optimizations
1367 This section describes some of the optimizations allowed by the CPU micro
1385    <= r0p3 of the CPU and is enabled by default.
1389    enabled only for revisions <= r1p2 of the CPU and is enabled by default,