Lines Matching refs:x30
48 str x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
52 ldr x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
62 mrs x30, ISR_EL1
63 tbz x30, #ISR_A_SHIFT, 2f
65 mrs x30, scr_el3
66 tst x30, #SCR_EA_BIT
90 per_cpu_cur percpu_data, x29, x30
91 mrs x30, cntpct_el0
92 str x30, [x29, #CPU_DATA_CPU_DATA_PMF_TS]
96 mrs x30, esr_el3
97 ubfx x30, x30, #ESR_EC_SHIFT, #ESR_EC_LENGTH
100 cmp x30, #EC_AARCH32_SMC
103 cmp x30, #EC_AARCH64_SMC
106 cmp x30, #EC_AARCH64_SYS
109 cmp x30, #EC_IMP_DEF_EL3
114 mrs x30, scr_el3
115 tst x30, #SCR_EA_BIT
132 stp x29, x30, [sp, #-16]!
134 mrs x30, esr_el3
135 ubfx x30, x30, #ESR_EC_SHIFT, #ESR_EC_LENGTH
138 cmp x30, #EC_BRK
141 ldp x29, x30, [sp], #16
202 ldr x30, [sp, #CTX_EL3STATE_OFFSET + CTX_NESTED_EA_FLAG]
203 cbz x30, 1f
509 ldr x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
687 sub x30, x30, x29
688 and x30, x30, #0x1ff
689 cmp x30, #0x80
692 mrs x30, esr_el3
693 ubfx x30, x30, #ESR_EC_SHIFT, #ESR_EC_LENGTH
694 cmp x30, #EC_AARCH32_SMC
696 cmp x30, #EC_AARCH64_SMC
704 ldr x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]