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2 * Copyright (c) 2016-2022, ARM Limited and Contributors. All rights reserved.
4 * SPDX-License-Identifier: BSD-3-Clause
27 /*---------------------------------------------
31 * ---------------------------------------------
36 /* ---------------------------------------------
38 * ---------------------------------------------
44 /* --------------------------------------------------------
45 * Enable the instruction cache - disable speculative loads
46 * --------------------------------------------------------
54 /* ---------------------------------------------
58 * ---------------------------------------------
61 /* ---------------------------------------------
68 * ---------------------------------------------
75 /* ---------------------------------------------
77 * - the .bss section;
78 * - the coherent memory section.
79 * ---------------------------------------------
86 /* --------------------------------------------
88 * as Normal-IS-WBWA when the MMU is enabled.
92 * --------------------------------------------
96 /* ---------------------------------------------
99 * ---------------------------------------------
105 /* ---------------------------------------------
108 * ---------------------------------------------
115 /* ---------------------------------------------
117 * ---------------------------------------------
121 /* ---------------------------------------------
123 * ---------------------------------------------