Lines Matching refs:attr
320 if ((mem_map->map[n].attr & TEE_MATTR_VALID_BLOCK) && in find_map_by_pa()
837 const uint32_t attr = TEE_MATTR_VALID_BLOCK; in core_mmu_type_to_attr() local
847 return attr | TEE_MATTR_SECURE | TEE_MATTR_PRWX | tagged; in core_mmu_type_to_attr()
851 return attr | TEE_MATTR_SECURE | TEE_MATTR_PRX | tagged; in core_mmu_type_to_attr()
854 return attr | TEE_MATTR_SECURE | TEE_MATTR_PR | tagged; in core_mmu_type_to_attr()
861 return attr | TEE_MATTR_SECURE | TEE_MATTR_PRW | tagged; in core_mmu_type_to_attr()
863 return attr | TEE_MATTR_SECURE | TEE_MATTR_PRWX | noncache; in core_mmu_type_to_attr()
866 return attr | TEE_MATTR_PRW | cached; in core_mmu_type_to_attr()
868 return attr | TEE_MATTR_SECURE | TEE_MATTR_PR | cached; in core_mmu_type_to_attr()
870 return attr | TEE_MATTR_SECURE | TEE_MATTR_PRW | cached; in core_mmu_type_to_attr()
878 return attr | TEE_MATTR_SECURE | TEE_MATTR_PRW | in core_mmu_type_to_attr()
882 return attr | TEE_MATTR_PRW | noncache; in core_mmu_type_to_attr()
884 return attr | TEE_MATTR_SECURE | TEE_MATTR_PRW | noncache; in core_mmu_type_to_attr()
886 return attr | TEE_MATTR_PRW | cached; in core_mmu_type_to_attr()
888 return attr | TEE_MATTR_SECURE | TEE_MATTR_PRW | cached; in core_mmu_type_to_attr()
890 return attr | TEE_MATTR_SECURE | TEE_MATTR_PRW | tagged; in core_mmu_type_to_attr()
892 return attr | TEE_MATTR_SECURE | TEE_MATTR_PR | cached; in core_mmu_type_to_attr()
962 uint32_t attr; in dump_xlat_table() local
967 core_mmu_get_entry(&tbl_info, idx, &pa, &attr); in dump_xlat_table()
968 if (attr || level > CORE_MMU_BASE_TABLE_LEVEL) { in dump_xlat_table()
971 if (core_mmu_entry_have_security_bit(attr)) { in dump_xlat_table()
972 if (attr & TEE_MATTR_SECURE) in dump_xlat_table()
978 if (attr & TEE_MATTR_TABLE) { in dump_xlat_table()
984 } else if (attr) { in dump_xlat_table()
988 mattr_is_cached(attr) ? "MEM" : in dump_xlat_table()
990 attr & TEE_MATTR_PW ? "RW" : "RO", in dump_xlat_table()
991 attr & TEE_MATTR_PX ? "X " : "XN", in dump_xlat_table()
1047 .attr = core_mmu_type_to_attr(MEM_AREA_PAGER_VASPACE), in add_pager_vaspace()
1311 map->attr = core_mmu_type_to_attr(map->type); in assign_mem_va_dir()
1347 map->attr = core_mmu_type_to_attr(map->type); in assign_mem_va_dir()
1481 .attr = core_mmu_type_to_attr(MEM_AREA_IDENTITY_MAP_RX), in mem_map_add_id_map()
1654 .attr = core_mmu_type_to_attr(MEM_AREA_IDENTITY_MAP_RX), in core_init_mmu_map()
1707 bool core_pbuf_is(uint32_t attr, paddr_t pbuf, size_t len) in core_pbuf_is() argument
1715 switch (attr) { in core_pbuf_is()
1735 return mattr_is_cached(map->attr); in core_pbuf_is()
1742 bool core_vbuf_is(uint32_t attr, const void *vbuf, size_t len) in core_vbuf_is() argument
1754 return core_pbuf_is(attr, p, len); in core_vbuf_is()
1816 paddr_t pa, uint32_t attr) in core_mmu_set_entry() argument
1820 idx, pa, attr); in core_mmu_set_entry()
1824 paddr_t *pa, uint32_t *attr) in core_mmu_get_entry() argument
1828 idx, pa, attr); in core_mmu_get_entry()
1868 core_mmu_set_entry(tbl_info, idx, pa, region->attr); in set_region()
1881 .attr = region->attr, in set_pg_region()
1884 uint32_t pgt_attr = (r.attr & TEE_MATTR_SECURE) | TEE_MATTR_TABLE; in set_pg_region()
1977 uint32_t attr = mm->attr; in core_mmu_map_region() local
1984 attr = 0; in core_mmu_map_region()
2004 bool secure = mm->attr & TEE_MATTR_SECURE; in core_mmu_map_region()
2023 core_mmu_set_entry(&tbl_info, idx, paddr, attr); in core_mmu_map_region()
2434 .attr = core_mmu_type_to_attr(type), in core_mmu_add_mapping()