Lines Matching refs:int32_t

235 int32_t plat_scmi_clock_rates_array(unsigned int channel_id,
247 int32_t plat_scmi_clock_rates_by_step(unsigned int channel_id,
267 int32_t plat_scmi_clock_set_rate(unsigned int channel_id, unsigned int scmi_id,
276 int32_t plat_scmi_clock_get_state(unsigned int channel_id,
286 int32_t plat_scmi_clock_set_state(unsigned int channel_id, unsigned int scmi_id,
314 int32_t plat_scmi_rd_autonomous(unsigned int channel_id, unsigned int scmi_id,
324 int32_t plat_scmi_rd_set_state(unsigned int channel_id, unsigned int scmi_id,
355 int32_t plat_scmi_voltd_levels_array(unsigned int channel_id,
367 int32_t plat_scmi_voltd_levels_by_step(unsigned int channel_id,
378 int32_t plat_scmi_voltd_get_level(unsigned int channel_id, unsigned int scmi_id,
388 int32_t plat_scmi_voltd_set_level(unsigned int channel_id, unsigned int scmi_id,
398 int32_t plat_scmi_voltd_get_config(unsigned int channel_id,
408 int32_t plat_scmi_voltd_set_config(unsigned int channel_id,
444 int32_t plat_scmi_perf_sustained_freq(unsigned int channel_id,
462 int32_t plat_scmi_perf_levels_array(unsigned int channel_id,
476 int32_t plat_scmi_perf_level_latency(unsigned int channel_id,
491 int32_t plat_scmi_perf_level_power_cost(unsigned int channel_id,
503 int32_t plat_scmi_perf_level_get(unsigned int channel_id,
513 int32_t plat_scmi_perf_level_set(unsigned int channel_id,