Lines Matching refs:dma
47 vaddr_t dma = core_mmu_get_va(CSUDMA_BASE, MEM_AREA_IO_SEC, in csudma_clear_intr() local
52 dma += CSUDMA_OFFSET_DIFF; in csudma_clear_intr()
56 io_write32(dma + CSUDMA_I_STS_OFFSET, val & mask); in csudma_clear_intr()
61 vaddr_t dma = core_mmu_get_va(CSUDMA_BASE, MEM_AREA_IO_SEC, in zynqmp_csudma_sync() local
66 if (!dma) in zynqmp_csudma_sync()
70 dma = dma + CSUDMA_OFFSET_DIFF; in zynqmp_csudma_sync()
73 status = io_read32(dma + CSUDMA_I_STS_OFFSET); in zynqmp_csudma_sync()
85 vaddr_t dma = core_mmu_get_va(CSUDMA_BASE, MEM_AREA_IO_SEC, in zynqmp_csudma_prepare() local
88 if (!dma) in zynqmp_csudma_prepare()
91 io_setbits32(dma + CSUDMA_CTRL_OFFSET, CSUDMA_CTRL_ENDIAN_MASK); in zynqmp_csudma_prepare()
92 dma = dma + CSUDMA_OFFSET_DIFF; in zynqmp_csudma_prepare()
93 io_setbits32(dma + CSUDMA_CTRL_OFFSET, CSUDMA_CTRL_ENDIAN_MASK); in zynqmp_csudma_prepare()
100 vaddr_t dma = core_mmu_get_va(CSUDMA_BASE, MEM_AREA_IO_SEC, in zynqmp_csudma_unprepare() local
103 io_clrbits32(dma + CSUDMA_CTRL_OFFSET, CSUDMA_CTRL_ENDIAN_MASK); in zynqmp_csudma_unprepare()
104 dma = dma + CSUDMA_OFFSET_DIFF; in zynqmp_csudma_unprepare()
105 io_clrbits32(dma + CSUDMA_CTRL_OFFSET, CSUDMA_CTRL_ENDIAN_MASK); in zynqmp_csudma_unprepare()
111 vaddr_t dma = core_mmu_get_va(CSUDMA_BASE, MEM_AREA_IO_SEC, in zynqmp_csudma_transfer() local
116 if (!dma) in zynqmp_csudma_transfer()
131 dma = dma + CSUDMA_OFFSET_DIFF; in zynqmp_csudma_transfer()
138 io_write32(dma + CSUDMA_ADDR_OFFSET, addr_offset); in zynqmp_csudma_transfer()
141 io_write32(dma + CSUDMA_ADDR_MSB_OFFSET, addr_offset); in zynqmp_csudma_transfer()
142 io_write32(dma + CSUDMA_SIZE_OFFSET, in zynqmp_csudma_transfer()