20 	return io_pa_or_va(&pd->base, WDT_SIZE);  in chip_to_base()
50 	vaddr_t base = chip_to_base(chip);  in sp805_config()  local
52 	io_write32(base + WDT_LOCK_OFFSET, WDT_UNLOCK_KEY);  in sp805_config()
53 	io_write32(base + WDT_LOAD_OFFSET, pd->load_val);  in sp805_config()
54 	io_write32(base + WDT_INTCLR_OFFSET, WDT_INT_CLR);  in sp805_config()
57 		io_write32(base + WDT_CONTROL_OFFSET,  in sp805_config()
60 	io_write32(base + WDT_LOCK_OFFSET, WDT_LOCK_KEY);  in sp805_config()
63 	(void)io_read32(base + WDT_LOCK_OFFSET);  in sp805_config()
78 	vaddr_t base = chip_to_base(chip);  in sp805_disable()  local
80 	io_write32(base + WDT_LOCK_OFFSET, WDT_UNLOCK_KEY);  in sp805_disable()
81 	io_write32(base + WDT_CONTROL_OFFSET, 0);  in sp805_disable()
82 	io_write32(base + WDT_LOCK_OFFSET, WDT_LOCK_KEY);  in sp805_disable()
85 	(void)io_read32(base + WDT_LOCK_OFFSET);  in sp805_disable()
132 TEE_Result sp805_wdt_init(struct sp805_wdt_data *pd, paddr_t base,  in sp805_wdt_init()  argument
136 	pd->base.pa = base;  in sp805_wdt_init()