Lines Matching refs:va
34 vaddr_t va = core_mmu_get_va(SRC_BASE, MEM_AREA_IO_SEC, SRC_SIZE); in imx_get_src_gpr_arg() local
36 return io_read32(va + SRC_GPR1 + ARG_OFFSET(cpu)); in imx_get_src_gpr_arg()
41 vaddr_t va = core_mmu_get_va(SRC_BASE, MEM_AREA_IO_SEC, SRC_SIZE); in imx_set_src_gpr_arg() local
43 io_write32(va + SRC_GPR1 + ARG_OFFSET(cpu), val); in imx_set_src_gpr_arg()
48 vaddr_t va = core_mmu_get_va(SRC_BASE, MEM_AREA_IO_SEC, SRC_SIZE); in imx_get_src_gpr_entry() local
50 return io_read32(va + SRC_GPR1 + ENTRY_OFFSET(cpu)); in imx_get_src_gpr_entry()
55 vaddr_t va = core_mmu_get_va(SRC_BASE, MEM_AREA_IO_SEC, SRC_SIZE); in imx_set_src_gpr_entry() local
57 io_write32(va + SRC_GPR1 + ENTRY_OFFSET(cpu), val); in imx_set_src_gpr_entry()
62 vaddr_t va = core_mmu_get_va(SRC_BASE, MEM_AREA_IO_SEC, SRC_SIZE); in imx_src_release_secondary_core() local
65 io_setbits32(va + SRC_A7RCR1, in imx_src_release_secondary_core()
68 io_setbits32(va + SRC_SCR, SRC_SCR_CORE1_ENABLE_BIT(cpu) | in imx_src_release_secondary_core()
74 vaddr_t va = core_mmu_get_va(SRC_BASE, MEM_AREA_IO_SEC, SRC_SIZE); in imx_src_shutdown_core() local
77 io_clrbits32(va + SRC_A7RCR1, in imx_src_shutdown_core()
80 uint32_t mask = io_read32(va + SRC_SCR); in imx_src_shutdown_core()
84 io_write32(va + SRC_SCR, mask); in imx_src_shutdown_core()