70 	vaddr_t base = core_mmu_get_va(SNVS_BASE, MEM_AREA_IO_SEC, SNVS_SIZE);  in is_otpmk_selected()  local
72 	hp_mks = io_read32(base + SNVS_HPCOMR);  in is_otpmk_selected()
79 		uint32_t lp_mks = io_read32(base + SNVS_LPMKCR);  in is_otpmk_selected()
93 	vaddr_t base = core_mmu_get_va(SNVS_BASE, MEM_AREA_IO_SEC, SNVS_SIZE);  in is_mks_locked()  local
95 	return io_read32(base + SNVS_HPLR) & SNVS_HPLR_MKS_SL ||  in is_mks_locked()
96 	       io_read32(base + SNVS_LPLR) & SNVS_LPLR_MKS_HL;  in is_mks_locked()
102 	vaddr_t base = core_mmu_get_va(SNVS_BASE, MEM_AREA_IO_SEC, SNVS_SIZE);  in set_mks_otpmk()  local
104 	io_setbits32(base + SNVS_HPCOMR, SNVS_HPCOMR_MKS_EN);  in set_mks_otpmk()
105 	io_clrbits32(base + SNVS_LPMKCR, SNVS_LPMKCR_MKCR_MKS_SEL);  in set_mks_otpmk()
106 	io_clrbits32(base + SNVS_HPLR, SNVS_HPLR_MKS_SL);  in set_mks_otpmk()
107 	io_setbits32(base + SNVS_LPLR, SNVS_LPLR_MKS_HL);  in set_mks_otpmk()
115 	vaddr_t base = core_mmu_get_va(SNVS_BASE, MEM_AREA_IO_SEC, SNVS_SIZE);  in is_otpmk_valid()  local
116 	uint32_t status = io_read32(base + SNVS_HPSR);  in is_otpmk_valid()
124 	vaddr_t base = core_mmu_get_va(SNVS_BASE, MEM_AREA_IO_SEC,  in snvs_get_security_cfg()  local
127 	val = (io_read32(base + SNVS_HPSR) & SNVS_HPSR_SYS_SECURITY_CFG) >>  in snvs_get_security_cfg()
201 	vaddr_t base = core_mmu_get_va(SNVS_BASE, MEM_AREA_IO_SEC, SNVS_SIZE);  in imx_snvs_shutdown()  local
203 	io_write32(base + SNVS_LPCR,  in imx_snvs_shutdown()