109 #define _RISAF_GET_REGION_ID(cfg)	((cfg) & DT_RISAF_REG_ID_MASK)  argument
123 	uint32_t cfg;  member
209 static uint32_t stm32_risaf_get_region_config(uint32_t cfg)  in stm32_risaf_get_region_config()  argument
211 	return SHIFT_U32((cfg & DT_RISAF_EN_MASK) >> DT_RISAF_EN_SHIFT,  in stm32_risaf_get_region_config()
213 	       SHIFT_U32((cfg & DT_RISAF_SEC_MASK) >> DT_RISAF_SEC_SHIFT,  in stm32_risaf_get_region_config()
215 	       SHIFT_U32((cfg & DT_RISAF_ENC_MASK) >> (DT_RISAF_ENC_SHIFT + 1),  in stm32_risaf_get_region_config()
217 	       SHIFT_U32((cfg & DT_RISAF_PRIV_MASK) >> DT_RISAF_PRIV_SHIFT,  in stm32_risaf_get_region_config()
221 static uint32_t stm32_risaf_get_region_cid_config(uint32_t cfg)  in stm32_risaf_get_region_cid_config()  argument
223 	return SHIFT_U32((cfg & DT_RISAF_WRITE_MASK) >> DT_RISAF_WRITE_SHIFT,  in stm32_risaf_get_region_cid_config()
225 	       SHIFT_U32((cfg & DT_RISAF_READ_MASK) >> DT_RISAF_READ_SHIFT,  in stm32_risaf_get_region_cid_config()
333 		if (!region[i].cfg)  in risaf_check_overlap()
350 					 uint32_t region_id, uint32_t cfg,  in risaf_configure_region()  argument
357 	if (cfg & _RISAF_REG_CFGR_ENC) {  in risaf_configure_region()
364 		if ((cfg & _RISAF_REG_CFGR_SEC) != _RISAF_REG_CFGR_SEC) {  in risaf_configure_region()
383 			cfg & _RISAF_REG_CFGR_ALL_MASK);  in risaf_configure_region()
469 		uint32_t id = _RISAF_GET_REGION_ID(regions[i].cfg);  in stm32_risaf_pm_resume()
473 		uint32_t cfg = 0;  in stm32_risaf_pm_resume()  local
478 		cfg = stm32_risaf_get_region_config(regions[i].cfg);  in stm32_risaf_pm_resume()
479 		cid_cfg = stm32_risaf_get_region_cid_config(regions[i].cfg);  in stm32_risaf_pm_resume()
482 		if (risaf_configure_region(risaf, id, cfg, cid_cfg,  in stm32_risaf_pm_resume()
496 		uint32_t id = _RISAF_GET_REGION_ID(risaf->pdata.regions[i].cfg);  in stm32_risaf_pm_suspend()
504 		uint32_t cfg = 0;  in stm32_risaf_pm_suspend()  local
513 		cfg = io_read32(base + _RISAF_REG_CFGR(id));  in stm32_risaf_pm_suspend()
514 		en = cfg & _RISAF_REG_CFGR_BREN;  in stm32_risaf_pm_suspend()
515 		sec = (cfg & _RISAF_REG_CFGR_SEC) >> _RISAF_REG_CFGR_SEC_SHIFT;  in stm32_risaf_pm_suspend()
516 		enc = (cfg & _RISAF_REG_CFGR_ENC) >> _RISAF_REG_CFGR_ENC_SHIFT;  in stm32_risaf_pm_suspend()
517 		priv = (cfg & _RISAF_REG_CFGR_PRIVC_MASK) >>  in stm32_risaf_pm_suspend()
525 		region->cfg = id | SHIFT_U32(en, DT_RISAF_EN_SHIFT) |  in stm32_risaf_pm_suspend()
594 		if (id == _RISAF_GET_REGION_ID(risaf->pdata.regions[i].cfg)) {  in stm32_risaf_acquire_access()
655 		if (id == _RISAF_GET_REGION_ID(risaf->pdata.regions[i].cfg)) {  in stm32_risaf_reconfigure_region()
774 		uint32_t cfg = 0;  in stm32_risaf_probe()  local
808 		regions[i].cfg = fdt32_to_cpu(*prop);  in stm32_risaf_probe()
814 		id = _RISAF_GET_REGION_ID(regions[i].cfg);  in stm32_risaf_probe()
817 		cfg = stm32_risaf_get_region_config(regions[i].cfg);  in stm32_risaf_probe()
819 		cid_cfg = stm32_risaf_get_region_cid_config(regions[i].cfg);  in stm32_risaf_probe()
824 		if (risaf_configure_region(risaf, id, cfg, cid_cfg,  in stm32_risaf_probe()