Lines Matching full:struct

25 static struct clk_stm32_priv *stm32_clock_data;
27 struct clk_stm32_priv *clk_stm32_get_priv(void) in clk_stm32_get_priv()
34 struct clk_stm32_priv *priv = clk_stm32_get_priv(); in clk_stm32_get_rcc_base()
42 struct clk_stm32_priv *priv = clk_stm32_get_priv(); in stm32_mux_get_parent()
43 const struct mux_cfg *mux = &priv->muxes[mux_id]; in stm32_mux_get_parent()
51 struct clk_stm32_priv *priv = clk_stm32_get_priv(); in stm32_mux_set_parent()
52 const struct mux_cfg *mux = &priv->muxes[mux_id]; in stm32_mux_set_parent()
67 struct clk_stm32_priv *priv = clk_stm32_get_priv(); in stm32_gate_endisable()
68 const struct gate_cfg *gate = &priv->gates[gate_id]; in stm32_gate_endisable()
92 struct clk_stm32_priv __maybe_unused *priv = clk_stm32_get_priv(); in stm32_gate_set_init_state()
100 struct clk_stm32_priv *priv = clk_stm32_get_priv(); in stm32_gate_disable()
111 struct clk_stm32_priv *priv = clk_stm32_get_priv(); in stm32_gate_enable()
122 struct clk_stm32_priv *priv = clk_stm32_get_priv(); in stm32_gate_is_enabled()
123 const struct gate_cfg *gate = &priv->gates[gate_id]; in stm32_gate_is_enabled()
131 struct clk_stm32_priv *priv = clk_stm32_get_priv(); in stm32_gate_wait_ready()
132 const struct gate_cfg *gate = &priv->gates[gate_id]; in stm32_gate_wait_ready()
184 static unsigned int _get_table_div(const struct div_table_cfg *table, in _get_table_div()
187 const struct div_table_cfg *clkt = NULL; in _get_table_div()
196 static unsigned int _get_table_val(const struct div_table_cfg *table, in _get_table_val()
199 const struct div_table_cfg *clkt = NULL; in _get_table_val()
208 static unsigned int _get_div(const struct div_table_cfg *table, in _get_div()
227 static unsigned int _get_val(const struct div_table_cfg *table, in _get_val()
246 static bool _is_valid_table_div(const struct div_table_cfg *table, in _is_valid_table_div()
249 const struct div_table_cfg *clkt = NULL; in _is_valid_table_div()
258 static bool _is_valid_div(const struct div_table_cfg *table, in _is_valid_div()
271 const struct div_table_cfg *table, uint8_t width, in divider_get_val()
289 struct clk_stm32_priv *priv = clk_stm32_get_priv(); in stm32_div_get_value()
290 const struct div_cfg *divider = &priv->div[div_id]; in stm32_div_get_value()
301 struct clk_stm32_priv *priv = clk_stm32_get_priv(); in stm32_div_set_value()
302 const struct div_cfg *divider = NULL; in stm32_div_set_value()
323 struct clk_stm32_priv *priv = clk_stm32_get_priv(); in stm32_div_get_rate()
324 const struct div_cfg *divider = &priv->div[div_id]; in stm32_div_get_rate()
338 struct clk_stm32_priv *priv = clk_stm32_get_priv(); in stm32_div_set_rate()
339 const struct div_cfg *divider = &priv->div[div_id]; in stm32_div_set_rate()
352 static size_t clk_stm32_mux_get_parent(struct clk *clk) in clk_stm32_mux_get_parent()
354 struct clk_stm32_mux_cfg *cfg = clk->priv; in clk_stm32_mux_get_parent()
359 static TEE_Result clk_stm32_mux_set_parent(struct clk *clk, size_t pidx) in clk_stm32_mux_set_parent()
361 struct clk_stm32_mux_cfg *cfg = clk->priv; in clk_stm32_mux_set_parent()
366 const struct clk_ops clk_stm32_mux_ops = {
372 static TEE_Result clk_stm32_gate_enable(struct clk *clk) in clk_stm32_gate_enable()
374 struct clk_stm32_gate_cfg *cfg = clk->priv; in clk_stm32_gate_enable()
381 static void clk_stm32_gate_disable(struct clk *clk) in clk_stm32_gate_disable()
383 struct clk_stm32_gate_cfg *cfg = clk->priv; in clk_stm32_gate_disable()
388 const struct clk_ops clk_stm32_gate_ops = {
393 static TEE_Result clk_stm32_gate_ready_enable(struct clk *clk) in clk_stm32_gate_ready_enable()
395 struct clk_stm32_gate_cfg *cfg = clk->priv; in clk_stm32_gate_ready_enable()
400 static void clk_stm32_gate_ready_disable(struct clk *clk) in clk_stm32_gate_ready_disable()
402 struct clk_stm32_gate_cfg *cfg = clk->priv; in clk_stm32_gate_ready_disable()
408 const struct clk_ops clk_stm32_gate_ready_ops = {
414 unsigned long clk_stm32_divider_get_rate(struct clk *clk, in clk_stm32_divider_get_rate()
417 struct clk_stm32_div_cfg *cfg = clk->priv; in clk_stm32_divider_get_rate()
422 TEE_Result clk_stm32_divider_set_rate(struct clk *clk, in clk_stm32_divider_set_rate()
426 struct clk_stm32_div_cfg *cfg = clk->priv; in clk_stm32_divider_set_rate()
431 const struct clk_ops clk_stm32_divider_ops = {
437 size_t clk_stm32_composite_get_parent(struct clk *clk) in clk_stm32_composite_get_parent()
439 struct clk_stm32_composite_cfg *cfg = clk->priv; in clk_stm32_composite_get_parent()
449 TEE_Result clk_stm32_composite_set_parent(struct clk *clk, size_t pidx) in clk_stm32_composite_set_parent()
451 struct clk_stm32_composite_cfg *cfg = clk->priv; in clk_stm32_composite_set_parent()
459 unsigned long clk_stm32_composite_get_rate(struct clk *clk, in clk_stm32_composite_get_rate()
462 struct clk_stm32_composite_cfg *cfg = clk->priv; in clk_stm32_composite_get_rate()
470 TEE_Result clk_stm32_composite_set_rate(struct clk *clk, unsigned long rate, in clk_stm32_composite_set_rate()
473 struct clk_stm32_composite_cfg *cfg = clk->priv; in clk_stm32_composite_set_rate()
481 TEE_Result clk_stm32_composite_gate_enable(struct clk *clk) in clk_stm32_composite_gate_enable()
483 struct clk_stm32_composite_cfg *cfg = clk->priv; in clk_stm32_composite_gate_enable()
490 void clk_stm32_composite_gate_disable(struct clk *clk) in clk_stm32_composite_gate_disable()
492 struct clk_stm32_composite_cfg *cfg = clk->priv; in clk_stm32_composite_gate_disable()
497 const struct clk_ops clk_stm32_composite_ops = {
506 TEE_Result clk_stm32_set_parent_by_index(struct clk *clk, size_t pidx) in clk_stm32_set_parent_by_index()
508 struct clk *parent = clk_get_parent_by_index(clk, pidx); in clk_stm32_set_parent_by_index()
537 TEE_Result clk_stm32_init(struct clk_stm32_priv *priv, uintptr_t base) in clk_stm32_init()
550 static unsigned long fixed_factor_get_rate(struct clk *clk, in fixed_factor_get_rate()
553 struct fixed_factor_cfg *d = clk->priv; in fixed_factor_get_rate()
563 const struct clk_ops clk_fixed_factor_ops = {
567 static unsigned long clk_fixed_get_rate(struct clk *clk, in clk_fixed_get_rate()
570 struct clk_fixed_rate_cfg *cfg = clk->priv; in clk_fixed_get_rate()
575 const struct clk_ops clk_fixed_clk_ops = {
579 struct clk *stm32mp_rcc_clock_id_to_clk(unsigned long clock_id) in stm32mp_rcc_clock_id_to_clk()
581 struct clk_stm32_priv *priv = clk_stm32_get_priv(); in stm32mp_rcc_clock_id_to_clk()
589 static TEE_Result stm32mp_clk_dt_get_clk(struct dt_pargs *pargs, in stm32mp_clk_dt_get_clk()
591 struct clk **out_clk) in stm32mp_clk_dt_get_clk()
594 struct clk *clk = NULL; in stm32mp_clk_dt_get_clk()
608 static void clk_stm32_register_clocks(struct clk_stm32_priv *priv) in clk_stm32_register_clocks()
613 struct clk *clk = priv->clk_refs[i]; in clk_stm32_register_clocks()
626 struct clk *clk = priv->clk_refs[i]; in clk_stm32_register_clocks()
637 struct clk_stm32_priv *priv) in stm32mp_clk_provider_probe_final()