87 		paddr_t pa;  in plat_console_init()  member
89 		[0] = { .pa = 0 },  in plat_console_init()
90 		[1] = { .pa = USART1_BASE },  in plat_console_init()
91 		[2] = { .pa = USART2_BASE },  in plat_console_init()
92 		[3] = { .pa = USART3_BASE },  in plat_console_init()
93 		[4] = { .pa = UART4_BASE },  in plat_console_init()
94 		[5] = { .pa = UART5_BASE },  in plat_console_init()
95 		[6] = { .pa = USART6_BASE },  in plat_console_init()
96 		[7] = { .pa = UART7_BASE },  in plat_console_init()
97 		[8] = { .pa = UART8_BASE },  in plat_console_init()
102 	if (!uarts[CFG_STM32_EARLY_CONSOLE_UART].pa)  in plat_console_init()
108 	stm32_uart_init(&console_data, uarts[CFG_STM32_EARLY_CONSOLE_UART].pa);  in plat_console_init()
449 	static struct io_pa_va base = { .pa = RCC_BASE };  in stm32_rcc_base()
456 	struct io_pa_va base = { .pa = GIC_BASE + GICD_OFFSET };  in get_gicd_base()
491 	static struct io_pa_va base = { .pa = TAMP_BASE };  in stm32_tamp_base()
583 paddr_t stm32mp1_pa_or_sram_alias_pa(paddr_t pa)  in stm32mp1_pa_or_sram_alias_pa()  argument
591 	if (core_is_buffer_inside(pa, 1, SRAM1_ALT_BASE, SRAM1_SIZE))  in stm32mp1_pa_or_sram_alias_pa()
592 		pa += SRAM1_BASE - SRAM1_ALT_BASE;  in stm32mp1_pa_or_sram_alias_pa()
593 	else if (core_is_buffer_inside(pa, 1, SRAM2_ALT_BASE, SRAM2_SIZE))  in stm32mp1_pa_or_sram_alias_pa()
594 		pa += SRAM2_BASE - SRAM2_ALT_BASE;  in stm32mp1_pa_or_sram_alias_pa()
595 	else if (core_is_buffer_inside(pa, 1, SRAM3_ALT_BASE, SRAM3_SIZE))  in stm32mp1_pa_or_sram_alias_pa()
596 		pa += SRAM3_BASE - SRAM3_ALT_BASE;  in stm32mp1_pa_or_sram_alias_pa()
597 	else if (core_is_buffer_inside(pa, 1, SRAM4_ALT_BASE, SRAM4_SIZE))  in stm32mp1_pa_or_sram_alias_pa()
598 		pa += SRAM4_BASE - SRAM4_ALT_BASE;  in stm32mp1_pa_or_sram_alias_pa()
600 	return pa;  in stm32mp1_pa_or_sram_alias_pa()