92 	vaddr_t addr = 0;  in imx6_tzasc_is_enabled()  local
103 	addr = core_mmu_get_va(base, MEM_AREA_IO_SEC, IOMUXC_SIZE);  in imx6_tzasc_is_enabled()
104 	if (!addr) {  in imx6_tzasc_is_enabled()
114 	return (io_read32(addr + IOMUXC_GPR9_OFFSET) & mask) == mask;  in imx6_tzasc_is_enabled()
120 	vaddr_t addr = 0;  in imx8m_tzasc_is_enabled()  local
124 	addr = core_mmu_get_va(IOMUXC_GPR_BASE, MEM_AREA_IO_SEC, IOMUXC_SIZE);  in imx8m_tzasc_is_enabled()
125 	if (!addr) {  in imx8m_tzasc_is_enabled()
133 	return (io_read32(addr + IOMUXC_GPR_GPR10_OFFSET) & mask) == mask;  in imx8m_tzasc_is_enabled()
152 static void imx_tzc_auto_configure(vaddr_t addr, vaddr_t rsize, uint32_t attr)  in imx_tzc_auto_configure()  argument
163 		addr_imx = addr - CFG_DRAM_BASE;  in imx_tzc_auto_configure()
165 		addr_imx = addr;  in imx_tzc_auto_configure()
176 	imx_tzc_auto_configure(ddr_mem->addr, ddr_mem->size, TZC_ATTR_SP_NS_RW);  in imx_tzc_auto_configure_ddr()
183 	vaddr_t addr[2] = {0};  in imx_configure_tzasc()  local
190 	addr[0] = core_mmu_get_va(TZASC_BASE, MEM_AREA_IO_SEC, 1);  in imx_configure_tzasc()
195 		addr[1] = core_mmu_get_va(TZASC2_BASE, MEM_AREA_IO_SEC, 1);  in imx_configure_tzasc()
202 		tzc_init(addr[i]);  in imx_configure_tzasc()