Lines Matching +full:1 +full:- +full:cell

3  * SPDX-License-Identifier:	GPL-2.0+
29 * good reason why driver-model conversion is infeasible. Examples include
35 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
36 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
37 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
38 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
39 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
41 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
42 COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
43 COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
44 COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
45 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
46 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
47 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
48 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
49 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
50 COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
52 COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
53 COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
54 COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
55 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
58 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
59 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
60 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
62 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
63 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
64 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
65 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
66 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
67 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
68 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
69 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
70 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
71 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
72 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
73 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
74 COMPAT(ROCKCHIP_NANDC, "rockchip,rk-nandc"),
107 (u32)(prop_after_size - prop), ((u32)(prop_end - prop))); in fdtdec_get_addr_size_fixed()
138 if (na < 1) { in fdtdec_get_addr_size_auto_parent()
139 debug("(bad #address-cells)\n"); in fdtdec_get_addr_size_auto_parent()
145 debug("(bad #size-cells)\n"); in fdtdec_get_addr_size_auto_parent()
193 const u32 *cell; in fdtdec_get_pci_addr() local
195 int ret = -ENOENT; in fdtdec_get_pci_addr()
201 * the value of the node's parent node's #address-cells and in fdtdec_get_pci_addr()
202 * #size-cells. They need to be 3 and 2 accordingly. However, in fdtdec_get_pci_addr()
205 cell = fdt_getprop(blob, node, prop_name, &len); in fdtdec_get_pci_addr()
206 if (!cell) in fdtdec_get_pci_addr()
215 (ulong)fdt32_to_cpu(cell[0]), in fdtdec_get_pci_addr()
216 (ulong)fdt32_to_cpu(cell[1]), in fdtdec_get_pci_addr()
217 (ulong)fdt32_to_cpu(cell[2])); in fdtdec_get_pci_addr()
218 if ((fdt32_to_cpu(*cell) & type) == type) { in fdtdec_get_pci_addr()
219 addr->phys_hi = fdt32_to_cpu(cell[0]); in fdtdec_get_pci_addr()
220 addr->phys_mid = fdt32_to_cpu(cell[1]); in fdtdec_get_pci_addr()
221 addr->phys_lo = fdt32_to_cpu(cell[1]); in fdtdec_get_pci_addr()
224 cell += (FDT_PCI_ADDR_CELLS + in fdtdec_get_pci_addr()
230 ret = -ENXIO; in fdtdec_get_pci_addr()
236 ret = -EINVAL; in fdtdec_get_pci_addr()
251 return -ENOENT; in fdtdec_get_pci_vendev()
276 list += (len + 1); in fdtdec_get_pci_vendev()
279 return -ENOENT; in fdtdec_get_pci_vendev()
288 barnum = addr->phys_hi & 0xff; in fdtdec_get_pci_bar32()
290 return -EINVAL; in fdtdec_get_pci_bar32()
292 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4; in fdtdec_get_pci_bar32()
314 const char *cell; in fdtdec_get_is_enabled() local
321 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html in fdtdec_get_is_enabled()
323 cell = fdt_getprop(blob, node, "status", NULL); in fdtdec_get_is_enabled()
324 if (cell) in fdtdec_get_is_enabled()
325 return 0 == strcmp(cell, "okay"); in fdtdec_get_is_enabled()
326 return 1; in fdtdec_get_is_enabled()
352 } while (*depthp > 1); in fdtdec_next_compatible_subnode()
355 if (*depthp == 1 && 0 == fdt_node_check_compatible( in fdtdec_next_compatible_subnode()
359 return -FDT_ERR_NOTFOUND; in fdtdec_next_compatible_subnode()
379 return -FDT_ERR_NOTFOUND; in fdtdec_next_alias()
434 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff)); in fdtdec_add_aliases_for_id()
435 if (prop->len && 0 == strncmp(path, name, name_len)) in fdtdec_add_aliases_for_id()
436 node = fdt_path_offset(blob, prop->data); in fdtdec_add_aliases_for_id()
449 found = -1; in fdtdec_add_aliases_for_id()
456 if (found == -1) { in fdtdec_add_aliases_for_id()
480 num_found = number + 1; in fdtdec_add_aliases_for_id()
500 num_found = i + 1; in fdtdec_add_aliases_for_id()
529 debug(" - %s, %s\n", name, prop); in fdtdec_get_alias_seq()
530 if (len < find_namelen || *prop != '/' || prop[len - 1] || in fdtdec_get_alias_seq()
535 if (strcmp(slash + 1, find_name)) in fdtdec_get_alias_seq()
538 if (val != -1) { in fdtdec_get_alias_seq()
546 return -ENOENT; in fdtdec_get_alias_seq()
565 return -FDT_ERR_NOTFOUND; in fdtdec_get_chosen_node()
588 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) || in fdtdec_prepare_fdt()
589 fdt_check_header(gd->fdt_blob)) { in fdtdec_prepare_fdt()
593 …device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG… in fdtdec_prepare_fdt()
595 if (gd->fdt_blob) { in fdtdec_prepare_fdt()
596 printf("fdt_blob=%p\n", gd->fdt_blob); in fdtdec_prepare_fdt()
597 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4, in fdtdec_prepare_fdt()
602 return -1; in fdtdec_prepare_fdt()
615 return -FDT_ERR_NOTFOUND; in fdtdec_lookup_phandle()
628 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
629 found, or -FDT_ERR_BADLAYOUT if not enough data
630 * @return pointer to cell, which is only valid if err == 0
635 const void *cell; in get_prop_check_min_len() local
639 cell = fdt_getprop(blob, node, prop_name, &len); in get_prop_check_min_len()
640 if (!cell) in get_prop_check_min_len()
641 *err = -FDT_ERR_NOTFOUND; in get_prop_check_min_len()
643 *err = -FDT_ERR_BADLAYOUT; in get_prop_check_min_len()
646 return cell; in get_prop_check_min_len()
652 const u32 *cell; in fdtdec_get_int_array() local
656 cell = get_prop_check_min_len(blob, node, prop_name, in fdtdec_get_int_array()
660 array[i] = fdt32_to_cpu(cell[i]); in fdtdec_get_int_array()
668 const u32 *cell; in fdtdec_get_int_array_count() local
673 cell = fdt_getprop(blob, node, prop_name, &len); in fdtdec_get_int_array_count()
674 if (!cell) in fdtdec_get_int_array_count()
675 return -FDT_ERR_NOTFOUND; in fdtdec_get_int_array_count()
680 array[i] = fdt32_to_cpu(cell[i]); in fdtdec_get_int_array_count()
688 const u32 *cell; in fdtdec_locate_array() local
691 cell = get_prop_check_min_len(blob, node, prop_name, in fdtdec_locate_array()
693 return err ? NULL : cell; in fdtdec_locate_array()
698 const s32 *cell; in fdtdec_get_bool() local
702 cell = fdt_getprop(blob, node, prop_name, &len); in fdtdec_get_bool()
703 return cell != NULL; in fdtdec_get_bool()
715 int node = -1; in fdtdec_parse_phandle_with_args()
721 return -ENOENT; in fdtdec_parse_phandle_with_args()
726 rc = -EINVAL; in fdtdec_parse_phandle_with_args()
736 * Find the provider node and parse the #*-cells in fdtdec_parse_phandle_with_args()
739 * This is not needed if the cell count is hard-coded in fdtdec_parse_phandle_with_args()
757 -1); in fdtdec_parse_phandle_with_args()
758 if (count == -1) { in fdtdec_parse_phandle_with_args()
786 * or return -ENOENT for an empty entry. in fdtdec_parse_phandle_with_args()
788 rc = -ENOENT; in fdtdec_parse_phandle_with_args()
802 out_args->node = node; in fdtdec_parse_phandle_with_args()
803 out_args->args_count = count; in fdtdec_parse_phandle_with_args()
805 out_args->args[i] = in fdtdec_parse_phandle_with_args()
814 node = -1; in fdtdec_parse_phandle_with_args()
821 * -ENOENT : index is for empty phandle in fdtdec_parse_phandle_with_args()
822 * -EINVAL : parsing error on data in fdtdec_parse_phandle_with_args()
823 * [1..n] : Number of phandle (count mode; when index = -1) in fdtdec_parse_phandle_with_args()
825 rc = index < 0 ? cur_index : -ENOENT; in fdtdec_parse_phandle_with_args()
844 const u8 *cell; in fdtdec_get_byte_array() local
847 cell = get_prop_check_min_len(blob, node, prop_name, count, &err); in fdtdec_get_byte_array()
849 memcpy(array, cell, count); in fdtdec_get_byte_array()
856 const u8 *cell; in fdtdec_locate_byte_array() local
859 cell = get_prop_check_min_len(blob, node, prop_name, count, &err); in fdtdec_locate_byte_array()
862 return cell; in fdtdec_locate_byte_array()
912 const fdt_addr_t *cell; in fdtdec_decode_region() local
917 cell = fdt_getprop(blob, node, prop_name, &len); in fdtdec_decode_region()
918 if (!cell || (len < sizeof(fdt_addr_t) * 2)) { in fdtdec_decode_region()
919 debug("cell=%p, len=%d\n", cell, len); in fdtdec_decode_region()
920 return -1; in fdtdec_decode_region()
923 *basep = fdt_addr_to_cpu(*cell); in fdtdec_decode_region()
924 *sizep = fdt_size_to_cpu(cell[1]); in fdtdec_decode_region()
935 while (cells--) in fdtdec_get_number()
963 res->start = res->end = fdtdec_get_number(ptr, na); in fdt_get_resource()
964 res->end += fdtdec_get_number(&ptr[na], ns) - 1; in fdt_get_resource()
972 return -FDT_ERR_NOTFOUND; in fdt_get_resource()
998 if (config_node == -1) { in fdtdec_decode_memory_region()
1002 return -ENOENT; in fdtdec_decode_memory_region()
1008 snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type, in fdtdec_decode_memory_region()
1021 return -ENOENT; in fdtdec_decode_memory_region()
1025 * Not strictly correct - the memory may have multiple banks. We just in fdtdec_decode_memory_region()
1031 return -EINVAL; in fdtdec_decode_memory_region()
1034 snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type, in fdtdec_decode_memory_region()
1040 return -EINVAL; in fdtdec_decode_memory_region()
1063 result->typ = fdtdec_get_int(blob, node, name, 0); in decode_timing_property()
1064 result->min = result->typ; in decode_timing_property()
1065 result->max = result->typ; in decode_timing_property()
1067 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3); in decode_timing_property()
1080 timings_node = fdt_subnode_offset(blob, parent, "display-timings"); in fdtdec_decode_display_timing()
1094 ret |= decode_timing_property(blob, node, "hback-porch", in fdtdec_decode_display_timing()
1095 &dt->hback_porch); in fdtdec_decode_display_timing()
1096 ret |= decode_timing_property(blob, node, "hfront-porch", in fdtdec_decode_display_timing()
1097 &dt->hfront_porch); in fdtdec_decode_display_timing()
1098 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive); in fdtdec_decode_display_timing()
1099 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len); in fdtdec_decode_display_timing()
1100 ret |= decode_timing_property(blob, node, "vback-porch", in fdtdec_decode_display_timing()
1101 &dt->vback_porch); in fdtdec_decode_display_timing()
1102 ret |= decode_timing_property(blob, node, "vfront-porch", in fdtdec_decode_display_timing()
1103 &dt->vfront_porch); in fdtdec_decode_display_timing()
1104 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive); in fdtdec_decode_display_timing()
1105 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len); in fdtdec_decode_display_timing()
1106 ret |= decode_timing_property(blob, node, "clock-frequency", in fdtdec_decode_display_timing()
1107 &dt->pixelclock); in fdtdec_decode_display_timing()
1109 dt->flags = 0; in fdtdec_decode_display_timing()
1110 val = fdtdec_get_int(blob, node, "vsync-active", -1); in fdtdec_decode_display_timing()
1111 if (val != -1) { in fdtdec_decode_display_timing()
1112 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH : in fdtdec_decode_display_timing()
1115 val = fdtdec_get_int(blob, node, "hsync-active", -1); in fdtdec_decode_display_timing()
1116 if (val != -1) { in fdtdec_decode_display_timing()
1117 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH : in fdtdec_decode_display_timing()
1120 val = fdtdec_get_int(blob, node, "de-active", -1); in fdtdec_decode_display_timing()
1121 if (val != -1) { in fdtdec_decode_display_timing()
1122 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH : in fdtdec_decode_display_timing()
1125 val = fdtdec_get_int(blob, node, "pixelclk-active", -1); in fdtdec_decode_display_timing()
1126 if (val != -1) { in fdtdec_decode_display_timing()
1127 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE : in fdtdec_decode_display_timing()
1132 dt->flags |= DISPLAY_FLAGS_INTERLACED; in fdtdec_decode_display_timing()
1134 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN; in fdtdec_decode_display_timing()
1136 dt->flags |= DISPLAY_FLAGS_DOUBLECLK; in fdtdec_decode_display_timing()
1146 mem = fdt_path_offset(gd->fdt_blob, "/memory"); in fdtdec_setup_memory_size()
1149 return -EINVAL; in fdtdec_setup_memory_size()
1152 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res); in fdtdec_setup_memory_size()
1155 return -EINVAL; in fdtdec_setup_memory_size()
1158 gd->ram_size = (phys_size_t)(res.end - res.start + 1); in fdtdec_setup_memory_size()
1160 (unsigned long long)gd->ram_size); in fdtdec_setup_memory_size()
1171 mem = fdt_node_offset_by_prop_value(gd->fdt_blob, -1, "device_type", in fdtdec_setup_memory_banksize()
1175 return -EINVAL; in fdtdec_setup_memory_banksize()
1179 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res); in fdtdec_setup_memory_banksize()
1180 if (ret == -FDT_ERR_NOTFOUND) { in fdtdec_setup_memory_banksize()
1182 mem = fdt_node_offset_by_prop_value(gd->fdt_blob, mem, in fdtdec_setup_memory_banksize()
1185 if (mem == -FDT_ERR_NOTFOUND) in fdtdec_setup_memory_banksize()
1188 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res); in fdtdec_setup_memory_banksize()
1189 if (ret == -FDT_ERR_NOTFOUND) in fdtdec_setup_memory_banksize()
1193 return -EINVAL; in fdtdec_setup_memory_banksize()
1196 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start; in fdtdec_setup_memory_banksize()
1197 gd->bd->bi_dram[bank].size = in fdtdec_setup_memory_banksize()
1198 (phys_size_t)(res.end - res.start + 1); in fdtdec_setup_memory_banksize()
1202 (unsigned long long)gd->bd->bi_dram[bank].start, in fdtdec_setup_memory_banksize()
1203 (unsigned long long)gd->bd->bi_dram[bank].size); in fdtdec_setup_memory_banksize()
1222 return -1; in uncompress_blob()
1225 return -EBADMSG; in uncompress_blob()
1231 return -ENOMEM; in uncompress_blob()
1237 return -ENOTSUPP; in uncompress_blob()
1251 return -EBADMSG; in uncompress_blob()
1259 return -ENOTSUPP; in uncompress_blob()
1273 gd->fdt_blob = __dtb_dt_spl_begin; in fdtdec_setup()
1275 gd->fdt_blob = __dtb_dt_begin; in fdtdec_setup()
1281 gd->fdt_blob = (ulong *)&_image_binary_end; in fdtdec_setup()
1283 gd->fdt_blob = (ulong *)&__bss_end; in fdtdec_setup()
1286 gd->fdt_blob = (ulong *)&_end; in fdtdec_setup()
1289 gd->fdt_blob_kern = (ulong *)ALIGN((ulong)gd->fdt_blob + in fdtdec_setup()
1290 fdt_totalsize(gd->fdt_blob), 8); in fdtdec_setup()
1291 if (fdt_check_header(gd->fdt_blob_kern)) in fdtdec_setup()
1292 gd->fdt_blob_kern = NULL; in fdtdec_setup()
1297 gd->fdt_blob = board_fdt_blob_setup(); in fdtdec_setup()
1301 return -1; in fdtdec_setup()
1307 gd->fdt_blob = (void *)prior_stage_fdt_address; in fdtdec_setup()
1309 gd->fdt_blob = (void *)env_get_ulong("fdtcontroladdr", 16, in fdtdec_setup()
1310 (uintptr_t)gd->fdt_blob); in fdtdec_setup()
1321 if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0) in fdtdec_setup()
1322 gd->fdt_blob = fdt_blob; in fdtdec_setup()
1328 fdt_blob = locate_dtb_in_fit(gd->fdt_blob); in fdtdec_setup()
1330 gd->fdt_blob = fdt_blob; in fdtdec_setup()