include/linux/mdio.h

3  * Copyright 2006-2009 Solarflare Communications Inc.
23 #define MDIO_MMD_AN		7	/* Auto-Negotiation */
43 #define MDIO_AN_ADVERTISE	16	/* AN advertising (base page) */
44 #define MDIO_AN_LPA		19	/* AN LP abilities (base page) */
47 /* Media-dependent registers. */
48 #define MDIO_PMA_10GBT_SWAPPOL	130	/* 10GBASE-T pair swap & polarity */
49 #define MDIO_PMA_10GBT_TXPWR	131	/* 10GBASE-T TX power control */
50 #define MDIO_PMA_10GBT_SNR	133	/* 10GBASE-T SNR margin, lane A.
51 					 * Lanes B-D are numbered 134-136. */
52 #define MDIO_PMA_10GBR_FECABLE	170	/* 10GBASE-R FEC ability */
53 #define MDIO_PCS_10GBX_STAT1	24	/* 10GBASE-X PCS status 1 */
54 #define MDIO_PCS_10GBRT_STAT1	32	/* 10GBASE-R/-T PCS status 1 */
55 #define MDIO_PCS_10GBRT_STAT2	33	/* 10GBASE-R/-T PCS status 2 */
56 #define MDIO_AN_10GBT_CTRL	32	/* 10GBASE-T auto-negotiation control */
57 #define MDIO_AN_10GBT_STAT	33	/* 10GBASE-T auto-negotiation status */
87 /* 10PASS-TS/2BASE-TL */
91 #define MDIO_STAT1_LPOWERABLE		0x0002	/* Low-power ability */
103 #define MDIO_PMA_SPEED_2B		0x0002	/* 2BASE-TL capable */
104 #define MDIO_PMA_SPEED_10P		0x0004	/* 10PASS-TS capable */
105 #define MDIO_PMA_SPEED_1000		0x0010	/* 1000M capable */
108 #define MDIO_PCS_SPEED_10P2B		0x0002	/* 10PASS-TS/2BASE-TL capable */
132 #define MDIO_PMA_CTRL2_10GBCX4		0x0000	/* 10GBASE-CX4 type */
133 #define MDIO_PMA_CTRL2_10GBEW		0x0001	/* 10GBASE-EW type */
134 #define MDIO_PMA_CTRL2_10GBLW		0x0002	/* 10GBASE-LW type */
135 #define MDIO_PMA_CTRL2_10GBSW		0x0003	/* 10GBASE-SW type */
136 #define MDIO_PMA_CTRL2_10GBLX4		0x0004	/* 10GBASE-LX4 type */
137 #define MDIO_PMA_CTRL2_10GBER		0x0005	/* 10GBASE-ER type */
138 #define MDIO_PMA_CTRL2_10GBLR		0x0006	/* 10GBASE-LR type */
139 #define MDIO_PMA_CTRL2_10GBSR		0x0007	/* 10GBASE-SR type */
140 #define MDIO_PMA_CTRL2_10GBLRM		0x0008	/* 10GBASE-LRM type */
141 #define MDIO_PMA_CTRL2_10GBT		0x0009	/* 10GBASE-T type */
142 #define MDIO_PMA_CTRL2_10GBKX4		0x000a	/* 10GBASE-KX4 type */
143 #define MDIO_PMA_CTRL2_10GBKR		0x000b	/* 10GBASE-KR type */
144 #define MDIO_PMA_CTRL2_1000BT		0x000c	/* 1000BASE-T type */
145 #define MDIO_PMA_CTRL2_1000BKX		0x000d	/* 1000BASE-KX type */
146 #define MDIO_PMA_CTRL2_100BTX		0x000e	/* 100BASE-TX type */
147 #define MDIO_PMA_CTRL2_10BT		0x000f	/* 10BASE-T type */
149 #define MDIO_PCS_CTRL2_10GBR		0x0000	/* 10GBASE-R type */
150 #define MDIO_PCS_CTRL2_10GBX		0x0001	/* 10GBASE-X type */
151 #define MDIO_PCS_CTRL2_10GBW		0x0002	/* 10GBASE-W type */
152 #define MDIO_PCS_CTRL2_10GBT		0x0003	/* 10GBASE-T type */
160 #define MDIO_PMA_STAT2_10GBEW		0x0002	/* 10GBASE-EW ability */
161 #define MDIO_PMA_STAT2_10GBLW		0x0004	/* 10GBASE-LW ability */
162 #define MDIO_PMA_STAT2_10GBSW		0x0008	/* 10GBASE-SW ability */
163 #define MDIO_PMA_STAT2_10GBLX4		0x0010	/* 10GBASE-LX4 ability */
164 #define MDIO_PMA_STAT2_10GBER		0x0020	/* 10GBASE-ER ability */
165 #define MDIO_PMA_STAT2_10GBLR		0x0040	/* 10GBASE-LR ability */
166 #define MDIO_PMA_STAT2_10GBSR		0x0080	/* 10GBASE-SR ability */
171 #define MDIO_PCS_STAT2_10GBR		0x0001	/* 10GBASE-R capable */
172 #define MDIO_PCS_STAT2_10GBX		0x0002	/* 10GBASE-X capable */
173 #define MDIO_PCS_STAT2_10GBW		0x0004	/* 10GBASE-W capable */
192 #define MDIO_PMA_EXTABLE_10GCX4		0x0001	/* 10GBASE-CX4 ability */
193 #define MDIO_PMA_EXTABLE_10GBLRM	0x0002	/* 10GBASE-LRM ability */
194 #define MDIO_PMA_EXTABLE_10GBT		0x0004	/* 10GBASE-T ability */
195 #define MDIO_PMA_EXTABLE_10GBKX4	0x0008	/* 10GBASE-KX4 ability */
196 #define MDIO_PMA_EXTABLE_10GBKR		0x0010	/* 10GBASE-KR ability */
197 #define MDIO_PMA_EXTABLE_1000BT		0x0020	/* 1000BASE-T ability */
198 #define MDIO_PMA_EXTABLE_1000BKX	0x0040	/* 1000BASE-KX ability */
199 #define MDIO_PMA_EXTABLE_100BTX		0x0080	/* 100BASE-TX ability */
200 #define MDIO_PMA_EXTABLE_10BT		0x0100	/* 10BASE-T ability */
209 /* PMA 10GBASE-T pair swap & polarity */
217 /* PMA 10GBASE-T TX power register. */
218 #define MDIO_PMA_10GBT_TXPWR_SHORT	0x0001	/* Short-reach mode */
220 /* PMA 10GBASE-T SNR registers. */
221 /* Value is SNR margin in dB, clamped to range [-127, 127], plus 0x8000. */
225 /* PMA 10GBASE-R FEC ability register. */
229 /* PCS 10GBASE-R/-T status register 1. */
232 /* PCS 10GBASE-R/-T status register 2. */
236 /* AN 10GBASE-T control register. */
237 #define MDIO_AN_10GBT_CTRL_ADV10G	0x1000	/* Advertise 10GBASE-T */
239 /* AN 10GBASE-T status register. */
250 #define MDIO_AN_EEE_ADV_1000T		0x0004	/* Advertise 1000T EEE cap */
280 #define MDIO_PRTAD_NONE			(-1)
281 #define MDIO_DEVAD_NONE			(-1)