Lines Matching defs:qe_immap
557 typedef struct qe_immap { struct
558 qe_iram_t iram; /* I-RAM */
559 qe_ic_t ic; /* Interrupt Controller */
560 cp_qe_t cp; /* Communications Processor */
561 qe_mux_t qmx; /* QE Multiplexer */
562 qe_timers_t qet; /* QE Timers */
563 spi_t spi[0x2]; /* spi */
564 mcc_t mcc; /* mcc */
565 qe_brg_t brg; /* brg */
566 usb_t usb; /* USB */
567 si1_t si1; /* SI */
568 u8 res11[0x800];
569 sir_t sir; /* SI Routing Tables */
570 ucc_t ucc1; /* ucc1 */
571 ucc_t ucc3; /* ucc3 */
572 ucc_t ucc5; /* ucc5 */
573 ucc_t ucc7; /* ucc7 */
574 u8 res12[0x600];
575 upc_t upc1; /* MultiPHY UTOPIA POS Controller 1 */
576 ucc_t ucc2; /* ucc2 */
577 ucc_t ucc4; /* ucc4 */
578 ucc_t ucc6; /* ucc6 */
579 ucc_t ucc8; /* ucc8 */
580 u8 res13[0x600];
581 upc_t upc2; /* MultiPHY UTOPIA POS Controller 2 */
582 sdma_t sdma; /* SDMA */
583 dbg_t dbg; /* Debug Space */
584 rsp_t rsp[0x2]; /* RISC Special Registers
586 u8 res14[0x300];
587 u8 res15[0x3A00];
588 u8 res16[0x8000]; /* 0x108000 - 0x110000 */
589 u8 muram[QE_MURAM_SIZE];