Lines Matching +full:chip +full:- +full:select
4 * Copyright 2013-2014 Freescale Semiconductor, Inc.
6 * SPDX-License-Identifier: GPL-2.0+
16 u32 cs0_bnds; /* Chip Select 0 Memory Bounds */
18 u32 cs1_bnds; /* Chip Select 1 Memory Bounds */
20 u32 cs2_bnds; /* Chip Select 2 Memory Bounds */
22 u32 cs3_bnds; /* Chip Select 3 Memory Bounds */
24 u32 cs0_config; /* Chip Select Configuration */
25 u32 cs1_config; /* Chip Select Configuration */
26 u32 cs2_config; /* Chip Select Configuration */
27 u32 cs3_config; /* Chip Select Configuration */
29 u32 cs0_config_2; /* Chip Select Configuration 2 */
30 u32 cs1_config_2; /* Chip Select Configuration 2 */
31 u32 cs2_config_2; /* Chip Select Configuration 2 */
32 u32 cs3_config_2; /* Chip Select Configuration 2 */
64 u8 res_198[0x1a0-0x198];
69 u8 res_1b0[0x200-0x1b0];
76 u8 res_218[0x220-0x218];
85 u8 res_240[0x250-0x240];
88 u8 res_258[0x260-0x258];
90 u8 res_264[0x400-0x264];
95 u8 res_410[0xb20-0x410];
132 u32 err_sbe; /* Single-Bit ECC Error Management */