Lines Matching +full:0 +full:x00200000
24 #define SYSCTL 0x0002e02c
25 #define SYSCTL_INITA 0x08000000
26 #define SYSCTL_TIMEOUT_MASK 0x000f0000
27 #define SYSCTL_CLOCK_MASK 0x0000fff0
29 #define SYSCTL_CKEN 0x00000008
30 #define SYSCTL_PEREN 0x00000004
31 #define SYSCTL_HCKEN 0x00000002
32 #define SYSCTL_IPGEN 0x00000001
34 #define SYSCTL_RSTA 0x01000000
35 #define SYSCTL_RSTC 0x02000000
36 #define SYSCTL_RSTD 0x04000000
38 #define VENDORSPEC_CKEN 0x00004000
39 #define VENDORSPEC_PEREN 0x00002000
40 #define VENDORSPEC_HCKEN 0x00001000
41 #define VENDORSPEC_IPGEN 0x00000800
42 #define VENDORSPEC_INIT 0x20007809
44 #define IRQSTAT 0x0002e030
45 #define IRQSTAT_DMAE (0x10000000)
46 #define IRQSTAT_AC12E (0x01000000)
47 #define IRQSTAT_DEBE (0x00400000)
48 #define IRQSTAT_DCE (0x00200000)
49 #define IRQSTAT_DTOE (0x00100000)
50 #define IRQSTAT_CIE (0x00080000)
51 #define IRQSTAT_CEBE (0x00040000)
52 #define IRQSTAT_CCE (0x00020000)
53 #define IRQSTAT_CTOE (0x00010000)
54 #define IRQSTAT_CINT (0x00000100)
55 #define IRQSTAT_CRM (0x00000080)
56 #define IRQSTAT_CINS (0x00000040)
57 #define IRQSTAT_BRR (0x00000020)
58 #define IRQSTAT_BWR (0x00000010)
59 #define IRQSTAT_DINT (0x00000008)
60 #define IRQSTAT_BGE (0x00000004)
61 #define IRQSTAT_TC (0x00000002)
62 #define IRQSTAT_CC (0x00000001)
69 #define IRQSTATEN 0x0002e034
70 #define IRQSTATEN_DMAE (0x10000000)
71 #define IRQSTATEN_AC12E (0x01000000)
72 #define IRQSTATEN_DEBE (0x00400000)
73 #define IRQSTATEN_DCE (0x00200000)
74 #define IRQSTATEN_DTOE (0x00100000)
75 #define IRQSTATEN_CIE (0x00080000)
76 #define IRQSTATEN_CEBE (0x00040000)
77 #define IRQSTATEN_CCE (0x00020000)
78 #define IRQSTATEN_CTOE (0x00010000)
79 #define IRQSTATEN_CINT (0x00000100)
80 #define IRQSTATEN_CRM (0x00000080)
81 #define IRQSTATEN_CINS (0x00000040)
82 #define IRQSTATEN_BRR (0x00000020)
83 #define IRQSTATEN_BWR (0x00000010)
84 #define IRQSTATEN_DINT (0x00000008)
85 #define IRQSTATEN_BGE (0x00000004)
86 #define IRQSTATEN_TC (0x00000002)
87 #define IRQSTATEN_CC (0x00000001)
89 #define ESDHCCTL 0x0002e40c
90 #define ESDHCCTL_PCS (0x00080000)
92 #define PRSSTAT 0x0002e024
93 #define PRSSTAT_DAT0 (0x01000000)
94 #define PRSSTAT_CLSL (0x00800000)
95 #define PRSSTAT_WPSPL (0x00080000)
96 #define PRSSTAT_CDPL (0x00040000)
97 #define PRSSTAT_CINS (0x00010000)
98 #define PRSSTAT_BREN (0x00000800)
99 #define PRSSTAT_BWEN (0x00000400)
100 #define PRSSTAT_SDSTB (0X00000008)
101 #define PRSSTAT_DLA (0x00000004)
102 #define PRSSTAT_CICHB (0x00000002)
103 #define PRSSTAT_CIDHB (0x00000001)
105 #define PROCTL 0x0002e028
106 #define PROCTL_INIT 0x00000020
107 #define PROCTL_DTW_4 0x00000002
108 #define PROCTL_DTW_8 0x00000004
110 #define CMDARG 0x0002e008
112 #define XFERTYP 0x0002e00c
113 #define XFERTYP_CMD(x) ((x & 0x3f) << 24)
114 #define XFERTYP_CMDTYP_NORMAL 0x0
115 #define XFERTYP_CMDTYP_SUSPEND 0x00400000
116 #define XFERTYP_CMDTYP_RESUME 0x00800000
117 #define XFERTYP_CMDTYP_ABORT 0x00c00000
118 #define XFERTYP_DPSEL 0x00200000
119 #define XFERTYP_CICEN 0x00100000
120 #define XFERTYP_CCCEN 0x00080000
121 #define XFERTYP_RSPTYP_NONE 0
122 #define XFERTYP_RSPTYP_136 0x00010000
123 #define XFERTYP_RSPTYP_48 0x00020000
124 #define XFERTYP_RSPTYP_48_BUSY 0x00030000
125 #define XFERTYP_MSBSEL 0x00000020
126 #define XFERTYP_DTDSEL 0x00000010
127 #define XFERTYP_DDREN 0x00000008
128 #define XFERTYP_AC12EN 0x00000004
129 #define XFERTYP_BCEN 0x00000002
130 #define XFERTYP_DMAEN 0x00000001
135 #define DSADDR 0x2e004
137 #define CMDRSP0 0x2e010
138 #define CMDRSP1 0x2e014
139 #define CMDRSP2 0x2e018
140 #define CMDRSP3 0x2e01c
142 #define DATPORT 0x2e020
144 #define WML 0x2e044
145 #define WML_WRITE 0x00010000
147 #define WML_RD_WML_MAX 0x80
148 #define WML_WR_WML_MAX 0x80
149 #define WML_RD_WML_MAX_VAL 0x0
150 #define WML_WR_WML_MAX_VAL 0x0
151 #define WML_RD_WML_MASK 0x7f
152 #define WML_WR_WML_MASK 0x7f0000
154 #define WML_RD_WML_MAX 0x10
155 #define WML_WR_WML_MAX 0x80
156 #define WML_RD_WML_MAX_VAL 0x10
157 #define WML_WR_WML_MAX_VAL 0x80
158 #define WML_RD_WML_MASK 0xff
159 #define WML_WR_WML_MASK 0xff0000
162 #define BLKATTR 0x2e004
163 #define BLKATTR_CNT(x) ((x & 0xffff) << 16)
164 #define BLKATTR_SIZE(x) (x & 0x1fff)
165 #define MAX_BLK_CNT 0x7fff /* so malloc will have enough room with 32M */
167 #define ESDHC_HOSTCAPBLT_VS18 0x04000000
168 #define ESDHC_HOSTCAPBLT_VS30 0x02000000
169 #define ESDHC_HOSTCAPBLT_VS33 0x01000000
170 #define ESDHC_HOSTCAPBLT_SRS 0x00800000
171 #define ESDHC_HOSTCAPBLT_DMAS 0x00400000
172 #define ESDHC_HOSTCAPBLT_HSS 0x00200000
174 #define ESDHC_VENDORSPEC_VSELECT 0x00000002 /* Use 1.8V */