Lines Matching +full:0 +full:x240a
14 #define DWMCI_CTRL 0x000
15 #define DWMCI_PWREN 0x004
16 #define DWMCI_CLKDIV 0x008
17 #define DWMCI_CLKSRC 0x00C
18 #define DWMCI_CLKENA 0x010
19 #define DWMCI_TMOUT 0x014
20 #define DWMCI_CTYPE 0x018
21 #define DWMCI_BLKSIZ 0x01C
22 #define DWMCI_BYTCNT 0x020
23 #define DWMCI_INTMASK 0x024
24 #define DWMCI_CMDARG 0x028
25 #define DWMCI_CMD 0x02C
26 #define DWMCI_RESP0 0x030
27 #define DWMCI_RESP1 0x034
28 #define DWMCI_RESP2 0x038
29 #define DWMCI_RESP3 0x03C
30 #define DWMCI_MINTSTS 0x040
31 #define DWMCI_RINTSTS 0x044
32 #define DWMCI_STATUS 0x048
33 #define DWMCI_FIFOTH 0x04C
34 #define DWMCI_CDETECT 0x050
35 #define DWMCI_WRTPRT 0x054
36 #define DWMCI_GPIO 0x058
37 #define DWMCI_TCMCNT 0x05C
38 #define DWMCI_TBBCNT 0x060
39 #define DWMCI_DEBNCE 0x064
40 #define DWMCI_USRID 0x068
41 #define DWMCI_VERID 0x06C
42 #define DWMCI_HCON 0x070
43 #define DWMCI_UHS_REG 0x074
44 #define DWMCI_BMOD 0x080
45 #define DWMCI_PLDMND 0x084
46 #define DWMCI_DBADDR 0x088
47 #define DWMCI_IDSTS 0x08C
48 #define DWMCI_IDINTEN 0x090
49 #define DWMCI_DSCADDR 0x094
50 #define DWMCI_BUFADDR 0x098
51 #define DWMCI_CARDTHRCTL 0x100
52 #define DWMCI_DATA 0x200
55 #define DWMCI_INTMSK_ALL 0xffffffff
76 #define DWMCI_CTRL_RESET (1 << 0)
99 #define DWMCI_CLKEN_ENABLE (1 << 0)
103 #define DWMCI_CTYPE_1BIT 0
104 #define DWMCI_CTYPE_4BIT (1 << 0)
109 #define DWMCI_FIFO_MASK 0x1fff
117 #define RX_WMARK_MASK (0xfff << RX_WMARK_SHIFT)
120 #define DMA_INTERFACE_IDMA (0x0)
121 #define SDMMC_GET_TRANS_MODE(x) (((x)>>16) & 0x3)
129 #define DWMCI_BMOD_IDMAC_RESET (1 << 0)
137 #define DWMCI_QUIRK_DISABLE_SMU (1 << 0)
141 * The burst size is set to 128 if DWMCI_MSIZE is set to 0x6.
143 #define DWMCI_MSIZE 0x6
146 #define DW_MMC_240A 0x240a
149 #define DWMCI_CDTHRCTRL_CONFIG (1 + (0x200 << 16))
163 * @fifoth_val: Value for FIFOTH register (or 0 to leave unset)
296 * @return 0 if OK, -ve if the block device could not be created
309 * @return 0 if OK, -ve on error